[WATCHDOG] cpwd.c: Coding style - Clean-up
This brings the cpwd.c watchdog driver in line with the kernel's coding style. Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
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@ -1,13 +1,13 @@
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/* cpwd.c - driver implementation for hardware watchdog
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* timers found on Sun Microsystems CP1400 and CP1500 boards.
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*
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* This device supports both the generic Linux watchdog
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* This device supports both the generic Linux watchdog
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* interface and Solaris-compatible ioctls as best it is
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* able.
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*
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* NOTE: CP1400 systems appear to have a defective intr_mask
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* register on the PLD, preventing the disabling of
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* timer interrupts. We use a timer to periodically
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* timer interrupts. We use a timer to periodically
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* reset 'stopped' watchdogs on affected platforms.
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*
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* Copyright (c) 2000 Eric Brower (ebrower@usa.net)
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@ -43,8 +43,8 @@
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#define WD_BLIMIT 0xFFFF
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#define WD0_MINOR 212
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#define WD1_MINOR 213
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#define WD2_MINOR 214
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#define WD1_MINOR 213
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#define WD2_MINOR 214
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/* Internal driver definitions. */
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#define WD0_ID 0
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@ -91,16 +91,16 @@ struct cpwd {
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static struct cpwd *cpwd_device;
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/* Sun uses Altera PLD EPF8820ATC144-4
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/* Sun uses Altera PLD EPF8820ATC144-4
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* providing three hardware watchdogs:
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*
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* 1) RIC - sends an interrupt when triggered
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* 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
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* 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
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* 1) RIC - sends an interrupt when triggered
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* 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
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* 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
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*
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*** Timer register block definition (struct wd_timer_regblk)
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*
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* dcntr and limit registers (halfword access):
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* dcntr and limit registers (halfword access):
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* -------------------
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* | 15 | ...| 1 | 0 |
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* -------------------
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@ -108,7 +108,8 @@ static struct cpwd *cpwd_device;
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* -------------------
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* dcntr - Current 16-bit downcounter value.
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* When downcounter reaches '0' watchdog expires.
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* Reading this register resets downcounter with 'limit' value.
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* Reading this register resets downcounter with
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* 'limit' value.
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* limit - 16-bit countdown value in 1/10th second increments.
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* Writing this register begins countdown with input value.
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* Reading from this register does not affect counter.
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@ -158,11 +159,11 @@ static int wd0_timeout = 0;
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static int wd1_timeout = 0;
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static int wd2_timeout = 0;
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module_param (wd0_timeout, int, 0);
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module_param(wd0_timeout, int, 0);
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MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
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module_param (wd1_timeout, int, 0);
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module_param(wd1_timeout, int, 0);
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MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
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module_param (wd2_timeout, int, 0);
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module_param(wd2_timeout, int, 0);
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MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
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MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
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@ -201,9 +202,9 @@ static u8 cpwd_readb(void __iomem *addr)
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static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
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{
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unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
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unsigned char setregs =
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(index == -1) ?
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(WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
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unsigned char setregs =
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(index == -1) ?
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(WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
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(p->devs[index].intr_mask);
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if (enable == WD_INTR_ON)
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@ -303,24 +304,24 @@ static int cpwd_getstatus(struct cpwd *p, int index)
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unsigned char ret = WD_STOPPED;
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/* determine STOPPED */
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if (!stat)
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if (!stat)
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return ret;
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/* determine EXPIRED vs FREERUN vs RUNNING */
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else if (WD_S_EXPIRED & stat) {
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ret = WD_EXPIRED;
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} else if(WD_S_RUNNING & stat) {
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} else if (WD_S_RUNNING & stat) {
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if (intr & p->devs[index].intr_mask) {
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ret = WD_FREERUN;
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} else {
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/* Fudge WD_EXPIRED status for defective CP1400--
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* IF timer is running
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* AND brokenstop is set
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* IF timer is running
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* AND brokenstop is set
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* AND an interrupt has been serviced
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* we are WD_EXPIRED.
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*
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* IF timer is running
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* AND brokenstop is set
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* IF timer is running
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* AND brokenstop is set
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* AND no interrupt has been serviced
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* we are WD_FREERUN.
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*/
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@ -329,7 +330,8 @@ static int cpwd_getstatus(struct cpwd *p, int index)
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if (p->devs[index].runstatus & WD_STAT_SVCD) {
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ret = WD_EXPIRED;
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} else {
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/* we could as well pretend we are expired */
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/* we could as well pretend
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* we are expired */
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ret = WD_FREERUN;
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}
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} else {
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@ -342,7 +344,7 @@ static int cpwd_getstatus(struct cpwd *p, int index)
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if (p->devs[index].runstatus & WD_STAT_SVCD)
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ret |= WD_SERVICED;
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return(ret);
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return ret;
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}
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static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
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@ -367,22 +369,22 @@ static int cpwd_open(struct inode *inode, struct file *f)
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struct cpwd *p = cpwd_device;
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lock_kernel();
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switch(iminor(inode)) {
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case WD0_MINOR:
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case WD1_MINOR:
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case WD2_MINOR:
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break;
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switch (iminor(inode)) {
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case WD0_MINOR:
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case WD1_MINOR:
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case WD2_MINOR:
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break;
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default:
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unlock_kernel();
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return -ENODEV;
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default:
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unlock_kernel();
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return -ENODEV;
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}
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/* Register IRQ on first open of device */
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if (!p->initialized) {
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if (request_irq(p->irq, &cpwd_interrupt,
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if (request_irq(p->irq, &cpwd_interrupt,
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IRQF_SHARED, DRIVER_NAME, p)) {
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printk(KERN_ERR PFX "Cannot register IRQ %d\n",
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printk(KERN_ERR PFX "Cannot register IRQ %d\n",
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p->irq);
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unlock_kernel();
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return -EBUSY;
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@ -442,7 +444,7 @@ static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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cpwd_starttimer(p, index);
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} else {
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return -EINVAL;
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}
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}
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break;
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/* Solaris-compatible IOCTLs */
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@ -458,7 +460,7 @@ static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
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case WIOCSTOP:
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if (p->enabled)
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return(-EINVAL);
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return -EINVAL;
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cpwd_stoptimer(p, index);
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break;
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@ -493,7 +495,7 @@ static long cpwd_compat_ioctl(struct file *file, unsigned int cmd,
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return rval;
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}
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static ssize_t cpwd_write(struct file *file, const char __user *buf,
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static ssize_t cpwd_write(struct file *file, const char __user *buf,
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size_t count, loff_t *ppos)
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{
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struct inode *inode = file->f_path.dentry->d_inode;
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@ -508,7 +510,7 @@ static ssize_t cpwd_write(struct file *file, const char __user *buf,
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return 0;
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}
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static ssize_t cpwd_read(struct file * file, char __user *buffer,
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static ssize_t cpwd_read(struct file *file, char __user *buffer,
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size_t count, loff_t *ppos)
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{
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return -EINVAL;
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