r8169: modify the flow of the hw reset.
- Disable tx and rx by resetting hw, so replace rtl8169_asic_down with rtl8169_hw_reset. - RxConfig bits 0 ~ 5 have to be cleared before hw reset to avoid receiving spurious data. - Certain chips need to do some checking before reset. - Remove hw reset which is done before hw_start. It is done in close, down or device probe functions. - Move rtl8169_init_ring_indexes function into rtl_hw_reset function. The indexes of tx and rx only need to be zero when the hw resets. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Acked-by: Francois Romieu <romieu@fr.zoreil.com>
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@ -1071,13 +1071,6 @@ static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
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RTL_W16(IntrStatus, 0xffff);
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}
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static void rtl8169_asic_down(void __iomem *ioaddr)
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{
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RTL_W8(ChipCmd, 0x00);
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rtl8169_irq_mask_and_ack(ioaddr);
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RTL_R16(CPlusCmd);
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}
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static unsigned int rtl8169_tbi_reset_pending(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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@ -3337,6 +3330,11 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp)
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}
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}
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static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
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{
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tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
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}
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static void rtl_hw_reset(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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@ -3349,8 +3347,10 @@ static void rtl_hw_reset(struct rtl8169_private *tp)
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for (i = 0; i < 100; i++) {
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if ((RTL_R8(ChipCmd) & CmdReset) == 0)
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break;
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msleep_interruptible(1);
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udelay(100);
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}
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rtl8169_init_ring_indexes(tp);
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}
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static int __devinit
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@ -3732,6 +3732,16 @@ err_pm_runtime_put:
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goto out;
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}
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static void rtl_rx_close(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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u32 rxcfg = RTL_R32(RxConfig);
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rxcfg &= ~(AcceptErr | AcceptRunt | AcceptBroadcast | AcceptMulticast |
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AcceptMyPhys | AcceptAllPhys);
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RTL_W32(RxConfig, rxcfg);
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}
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static void rtl8169_hw_reset(struct rtl8169_private *tp)
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{
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void __iomem *ioaddr = tp->mmio_addr;
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@ -3739,19 +3749,19 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp)
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/* Disable interrupts */
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rtl8169_irq_mask_and_ack(ioaddr);
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rtl_rx_close(tp);
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if (tp->mac_version == RTL_GIGA_MAC_VER_27 ||
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tp->mac_version == RTL_GIGA_MAC_VER_28 ||
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tp->mac_version == RTL_GIGA_MAC_VER_31) {
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while (RTL_R8(TxPoll) & NPQ)
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udelay(20);
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} else {
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RTL_W8(ChipCmd, RTL_R8(ChipCmd) | StopReq);
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udelay(100);
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}
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/* Reset the chipset */
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RTL_W8(ChipCmd, CmdReset);
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/* PCI commit */
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RTL_R8(ChipCmd);
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rtl_hw_reset(tp);
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}
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static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)
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@ -3771,8 +3781,6 @@ static void rtl_hw_start(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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rtl_hw_reset(tp);
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tp->hw_start(dev);
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netif_start_queue(dev);
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@ -4581,11 +4589,6 @@ err_out:
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return -ENOMEM;
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}
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static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)
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{
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tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
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}
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static int rtl8169_init_ring(struct net_device *dev)
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{
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struct rtl8169_private *tp = netdev_priv(dev);
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@ -4713,7 +4716,7 @@ static void rtl8169_reset_task(struct work_struct *work)
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rtl8169_tx_clear(tp);
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rtl8169_init_ring_indexes(tp);
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rtl8169_hw_reset(tp);
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rtl_hw_start(dev);
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netif_wake_queue(dev);
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rtl8169_check_link_status(dev, tp, tp->mmio_addr);
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@ -5127,7 +5130,7 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance)
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* the chip, so just exit the loop.
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*/
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if (unlikely(!netif_running(dev))) {
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rtl8169_asic_down(ioaddr);
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rtl8169_hw_reset(tp);
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break;
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}
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@ -5250,7 +5253,7 @@ static void rtl8169_down(struct net_device *dev)
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spin_lock_irq(&tp->lock);
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rtl8169_asic_down(ioaddr);
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rtl8169_hw_reset(tp);
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/*
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* At this point device interrupts can not be enabled in any function,
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* as netif_running is not true (rtl8169_interrupt, rtl8169_reset_task,
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@ -5504,7 +5507,7 @@ static void rtl_shutdown(struct pci_dev *pdev)
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spin_lock_irq(&tp->lock);
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rtl8169_asic_down(ioaddr);
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rtl8169_hw_reset(tp);
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spin_unlock_irq(&tp->lock);
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