ALSA: hda_controller: Separate stream_tag for input and output streams.
Implemented separate stream_tag assignment for input and output streams. According to hda specification stream tag must be unique throughout the input streams group, however an output stream might use a stream tag which is already in use by an input stream. This change is necessary to support HW which provides a total of more than 15 stream DMA engines which with legacy implementation causes an overflow on SDxCTL.STRM field (and the whole SDxCTL register) and as a result usage of Reserved value 0 in the SDxCTL.STRM field which confuses HDA controller. Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com> Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Libin Yang <libin.yang@intel.com> Reviewed-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -1922,10 +1922,18 @@ int azx_mixer_create(struct azx *chip)
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EXPORT_SYMBOL_GPL(azx_mixer_create);
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static bool is_input_stream(struct azx *chip, unsigned char index)
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{
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return (index >= chip->capture_index_offset &&
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index < chip->capture_index_offset + chip->capture_streams);
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}
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/* initialize SD streams */
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int azx_init_stream(struct azx *chip)
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{
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int i;
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int in_stream_tag = 0;
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int out_stream_tag = 0;
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/* initialize each stream (aka device)
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* assign the starting bdl address to each stream (device)
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@ -1938,9 +1946,21 @@ int azx_init_stream(struct azx *chip)
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azx_dev->sd_addr = chip->remap_addr + (0x20 * i + 0x80);
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/* int mask: SDI0=0x01, SDI1=0x02, ... SDO3=0x80 */
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azx_dev->sd_int_sta_mask = 1 << i;
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/* stream tag: must be non-zero and unique */
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azx_dev->index = i;
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azx_dev->stream_tag = i + 1;
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/* stream tag must be unique throughout
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* the stream direction group,
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* valid values 1...15
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* use separate stream tag if the flag
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* AZX_DCAPS_SEPARATE_STREAM_TAG is used
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*/
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if (chip->driver_caps & AZX_DCAPS_SEPARATE_STREAM_TAG)
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azx_dev->stream_tag =
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is_input_stream(chip, i) ?
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++in_stream_tag :
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++out_stream_tag;
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else
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azx_dev->stream_tag = i + 1;
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}
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return 0;
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@ -171,6 +171,7 @@ enum { SDI0, SDI1, SDI2, SDI3, SDO0, SDO1, SDO2, SDO3 };
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#define AZX_DCAPS_I915_POWERWELL (1 << 27) /* HSW i915 powerwell support */
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#define AZX_DCAPS_CORBRP_SELF_CLEAR (1 << 28) /* CORBRP clears itself after reset */
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#define AZX_DCAPS_NO_MSI64 (1 << 29) /* Stick to 32-bit MSIs */
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#define AZX_DCAPS_SEPARATE_STREAM_TAG (1 << 30) /* capture and playback use separate stream tag */
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enum {
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AZX_SNOOP_TYPE_NONE ,
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