ARM: davinci: remove watchdog reset
This removes the watchdog reset code. The reset has been moved to drivers/watchdog/davinci_wdt.c. The watchdog driver registers the reset with the kernel so defining a reset for each machine is no longer needed. Signed-off-by: David Lechner <david@lechnology.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
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@ -638,5 +638,4 @@ MACHINE_START(DAVINCI_DA830_EVM, "DaVinci DA830/OMAP-L137/AM17x EVM")
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.init_machine = da830_evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = da8xx_restart,
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MACHINE_END
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@ -1481,6 +1481,5 @@ MACHINE_START(DAVINCI_DA850_EVM, "DaVinci DA850/OMAP-L138/AM18x EVM")
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.init_machine = da850_evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = da8xx_restart,
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.reserve = da8xx_rproc_reserve_cma,
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MACHINE_END
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@ -431,5 +431,4 @@ MACHINE_START(DAVINCI_DM355_EVM, "DaVinci DM355 EVM")
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.init_machine = dm355_evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -275,5 +275,4 @@ MACHINE_START(DM355_LEOPARD, "DaVinci DM355 leopard")
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.init_machine = dm355_leopard_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -778,6 +778,5 @@ MACHINE_START(DAVINCI_DM365_EVM, "DaVinci DM365 EVM")
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.init_machine = dm365_evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -832,5 +832,4 @@ MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
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.init_machine = davinci_evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -801,7 +801,6 @@ MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
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.init_machine = evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
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@ -812,6 +811,5 @@ MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
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.init_machine = evm_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -570,5 +570,4 @@ MACHINE_START(MITYOMAPL138, "MityDSP-L138/MityARM-1808")
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.init_machine = mityomapl138_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = da8xx_restart,
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MACHINE_END
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@ -231,5 +231,4 @@ MACHINE_START(NEUROS_OSD2, "Neuros OSD2")
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.init_machine = davinci_ntosd2_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -334,6 +334,5 @@ MACHINE_START(OMAPL138_HAWKBOARD, "AM18x/OMAP-L138 Hawkboard")
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.init_machine = omapl138_hawk_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = da8xx_restart,
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.reserve = da8xx_rproc_reserve_cma,
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MACHINE_END
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@ -154,5 +154,4 @@ MACHINE_START(SFFSDR, "Lyrtech SFFSDR")
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.init_machine = davinci_sffsdr_init,
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.init_late = davinci_init_late,
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.dma_zone_size = SZ_128M,
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.restart = davinci_restart,
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MACHINE_END
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@ -135,9 +135,6 @@ int davinci_clk_reset(struct clk *clk, bool reset);
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void davinci_clk_enable(struct clk *clk);
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void davinci_clk_disable(struct clk *clk);
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extern struct platform_device davinci_wdt_device;
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extern void davinci_watchdog_reset(struct platform_device *);
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#endif
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#endif
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@ -100,7 +100,6 @@ DT_MACHINE_START(DA850_DT, "Generic DA850/OMAP-L138/AM18x")
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.init_machine = da850_init_machine,
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.dt_compat = da850_boards_compat,
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.init_late = davinci_init_late,
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.restart = da8xx_restart,
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MACHINE_END
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#endif
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@ -370,19 +370,6 @@ static struct platform_device da8xx_wdt_device = {
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.resource = da8xx_watchdog_resources,
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};
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void da8xx_restart(enum reboot_mode mode, const char *cmd)
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{
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struct device *dev;
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dev = bus_find_device_by_name(&platform_bus_type, NULL, "davinci-wdt");
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if (!dev) {
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pr_err("%s: failed to find watchdog device\n", __func__);
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return;
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}
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davinci_watchdog_reset(to_platform_device(dev));
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}
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int __init da8xx_register_watchdog(void)
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{
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return platform_device_register(&da8xx_wdt_device);
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@ -282,18 +282,13 @@ static struct resource wdt_resources[] = {
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},
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};
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struct platform_device davinci_wdt_device = {
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static struct platform_device davinci_wdt_device = {
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.name = "davinci-wdt",
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.id = -1,
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.num_resources = ARRAY_SIZE(wdt_resources),
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.resource = wdt_resources,
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};
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void davinci_restart(enum reboot_mode mode, const char *cmd)
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{
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davinci_watchdog_reset(&davinci_wdt_device);
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}
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int davinci_init_wdt(void)
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{
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return platform_device_register(&davinci_wdt_device);
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@ -81,7 +81,6 @@ extern struct davinci_soc_info davinci_soc_info;
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extern void davinci_common_init(const struct davinci_soc_info *soc_info);
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extern void davinci_init_ide(void);
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void davinci_restart(enum reboot_mode mode, const char *cmd);
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void davinci_init_late(void);
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#ifdef CONFIG_DAVINCI_RESET_CLOCKS
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@ -119,7 +119,6 @@ int da850_register_vpif_display
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(struct vpif_display_config *display_config);
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int da850_register_vpif_capture
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(struct vpif_capture_config *capture_config);
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void da8xx_restart(enum reboot_mode mode, const char *cmd);
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void da8xx_rproc_reserve_cma(void);
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int da8xx_register_rproc(void);
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int da850_register_gpio(void);
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@ -80,13 +80,6 @@ enum {
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#define TGCR_UNRESET 0x1
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#define TGCR_RESET_MASK 0x3
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#define WDTCR_WDEN_SHIFT 14
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#define WDTCR_WDEN_DISABLE 0x0
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#define WDTCR_WDEN_ENABLE 0x1
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#define WDTCR_WDKEY_SHIFT 16
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#define WDTCR_WDKEY_SEQ0 0xa5c6
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#define WDTCR_WDKEY_SEQ1 0xda7e
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struct timer_s {
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char *name;
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unsigned int id;
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@ -409,53 +402,3 @@ void __init davinci_timer_init(void)
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for (i=0; i< ARRAY_SIZE(timers); i++)
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timer32_config(&timers[i]);
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}
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/* reset board using watchdog timer */
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void davinci_watchdog_reset(struct platform_device *pdev)
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{
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u32 tgcr, wdtcr;
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void __iomem *base;
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struct clk *wd_clk;
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base = ioremap(pdev->resource[0].start, SZ_4K);
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if (WARN_ON(!base))
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return;
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wd_clk = clk_get(&pdev->dev, NULL);
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if (WARN_ON(IS_ERR(wd_clk)))
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return;
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clk_prepare_enable(wd_clk);
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/* disable, internal clock source */
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__raw_writel(0, base + TCR);
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/* reset timer, set mode to 64-bit watchdog, and unreset */
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tgcr = 0;
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__raw_writel(tgcr, base + TGCR);
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tgcr = TGCR_TIMMODE_64BIT_WDOG << TGCR_TIMMODE_SHIFT;
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tgcr |= (TGCR_UNRESET << TGCR_TIM12RS_SHIFT) |
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(TGCR_UNRESET << TGCR_TIM34RS_SHIFT);
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__raw_writel(tgcr, base + TGCR);
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/* clear counter and period regs */
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__raw_writel(0, base + TIM12);
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__raw_writel(0, base + TIM34);
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__raw_writel(0, base + PRD12);
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__raw_writel(0, base + PRD34);
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/* put watchdog in pre-active state */
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wdtcr = __raw_readl(base + WDTCR);
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wdtcr = (WDTCR_WDKEY_SEQ0 << WDTCR_WDKEY_SHIFT) |
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(WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
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__raw_writel(wdtcr, base + WDTCR);
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/* put watchdog in active state */
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wdtcr = (WDTCR_WDKEY_SEQ1 << WDTCR_WDKEY_SHIFT) |
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(WDTCR_WDEN_ENABLE << WDTCR_WDEN_SHIFT);
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__raw_writel(wdtcr, base + WDTCR);
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/* write an invalid value to the WDKEY field to trigger
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* a watchdog reset */
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wdtcr = 0x00004000;
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__raw_writel(wdtcr, base + WDTCR);
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}
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