Merge branch 'pci/host-rockchip' into next
* pci/host-rockchip: PCI: rockchip: Modularize PCI: Export pci_remap_iospace() and pci_unmap_iospace() PCI: rockchip: Add remove() support PCI: rockchip: Set PCI_EXP_LNKSTA_SLC in the Root Port PCI: rockchip: Advertise 128-byte Read Completion Boundary support PCI: rockchip: Make 'return 0' more obvious in probe() PCI: rockchip: Unindent rockchip_pcie_set_power_limit() PCI: rockchip: Handle regulator_get_current_limit() failure correctly
This commit is contained in:
commit
9577367283
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@ -170,7 +170,7 @@ config PCI_HOST_THUNDER_ECAM
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Say Y here if you want ECAM support for CN88XX-Pass-1.x Cavium Thunder SoCs.
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config PCIE_ROCKCHIP
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bool "Rockchip PCIe controller"
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tristate "Rockchip PCIe controller"
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depends on ARCH_ROCKCHIP || COMPILE_TEST
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depends on OF
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depends on PCI_MSI_IRQ_DOMAIN
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@ -26,6 +26,7 @@
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#include <linux/irqdomain.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of_address.h>
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#include <linux/of_device.h>
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#include <linux/of_pci.h>
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@ -223,9 +224,11 @@ struct rockchip_pcie {
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int link_gen;
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struct device *dev;
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struct irq_domain *irq_domain;
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u32 io_size;
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int offset;
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struct pci_bus *root_bus;
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struct resource *io;
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phys_addr_t io_bus_addr;
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u32 io_size;
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void __iomem *msg_region;
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u32 mem_size;
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phys_addr_t msg_bus_addr;
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@ -425,7 +428,8 @@ static struct pci_ops rockchip_pcie_ops = {
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static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
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{
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u32 status, curr, scale, power;
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int curr;
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u32 status, scale, power;
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if (IS_ERR(rockchip->vpcie3v3))
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return;
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@ -437,24 +441,25 @@ static void rockchip_pcie_set_power_limit(struct rockchip_pcie *rockchip)
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* to the actual power supply.
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*/
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curr = regulator_get_current_limit(rockchip->vpcie3v3);
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if (curr > 0) {
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scale = 3; /* 0.001x */
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curr = curr / 1000; /* convert to mA */
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power = (curr * 3300) / 1000; /* milliwatt */
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while (power > PCIE_RC_CONFIG_DCR_CSPL_LIMIT) {
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if (!scale) {
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dev_warn(rockchip->dev, "invalid power supply\n");
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return;
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}
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scale--;
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power = power / 10;
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}
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if (curr <= 0)
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return;
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status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_DCR);
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status |= (power << PCIE_RC_CONFIG_DCR_CSPL_SHIFT) |
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(scale << PCIE_RC_CONFIG_DCR_CPLS_SHIFT);
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rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_DCR);
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scale = 3; /* 0.001x */
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curr = curr / 1000; /* convert to mA */
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power = (curr * 3300) / 1000; /* milliwatt */
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while (power > PCIE_RC_CONFIG_DCR_CSPL_LIMIT) {
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if (!scale) {
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dev_warn(rockchip->dev, "invalid power supply\n");
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return;
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}
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scale--;
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power = power / 10;
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}
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status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_DCR);
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status |= (power << PCIE_RC_CONFIG_DCR_CSPL_SHIFT) |
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(scale << PCIE_RC_CONFIG_DCR_CPLS_SHIFT);
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rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_DCR);
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}
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/**
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@ -596,7 +601,12 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
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/* Set RC's clock architecture as common clock */
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status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_LCS);
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status |= PCI_EXP_LNKCTL_CCC;
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status |= PCI_EXP_LNKSTA_SLC << 16;
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rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_LCS);
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/* Set RC's RCB to 128 */
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status = rockchip_pcie_read(rockchip, PCIE_RC_CONFIG_LCS);
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status |= PCI_EXP_LNKCTL_RCB;
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rockchip_pcie_write(rockchip, status, PCIE_RC_CONFIG_LCS);
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/* Enable Gen1 training */
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@ -1359,6 +1369,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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err, io);
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continue;
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}
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rockchip->io = io;
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break;
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case IORESOURCE_MEM:
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mem = win->res;
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@ -1390,6 +1401,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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err = -ENOMEM;
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goto err_free_res;
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}
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rockchip->root_bus = bus;
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pci_bus_size_bridges(bus);
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pci_bus_assign_resources(bus);
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@ -1397,7 +1409,7 @@ static int rockchip_pcie_probe(struct platform_device *pdev)
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pcie_bus_configure_settings(child);
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pci_bus_add_devices(bus);
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return err;
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return 0;
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err_free_res:
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pci_free_resource_list(&res);
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@ -1420,6 +1432,34 @@ err_aclk_pcie:
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return err;
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}
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static int rockchip_pcie_remove(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct rockchip_pcie *rockchip = dev_get_drvdata(dev);
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pci_stop_root_bus(rockchip->root_bus);
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pci_remove_root_bus(rockchip->root_bus);
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pci_unmap_iospace(rockchip->io);
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irq_domain_remove(rockchip->irq_domain);
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phy_power_off(rockchip->phy);
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phy_exit(rockchip->phy);
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clk_disable_unprepare(rockchip->clk_pcie_pm);
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clk_disable_unprepare(rockchip->hclk_pcie);
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clk_disable_unprepare(rockchip->aclk_perf_pcie);
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clk_disable_unprepare(rockchip->aclk_pcie);
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if (!IS_ERR(rockchip->vpcie3v3))
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regulator_disable(rockchip->vpcie3v3);
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if (!IS_ERR(rockchip->vpcie1v8))
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regulator_disable(rockchip->vpcie1v8);
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if (!IS_ERR(rockchip->vpcie0v9))
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regulator_disable(rockchip->vpcie0v9);
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return 0;
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}
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static const struct dev_pm_ops rockchip_pcie_pm_ops = {
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SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(rockchip_pcie_suspend_noirq,
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rockchip_pcie_resume_noirq)
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@ -1429,6 +1469,7 @@ static const struct of_device_id rockchip_pcie_of_match[] = {
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{ .compatible = "rockchip,rk3399-pcie", },
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{}
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};
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MODULE_DEVICE_TABLE(of, rockchip_pcie_of_match);
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static struct platform_driver rockchip_pcie_driver = {
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.driver = {
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@ -1437,6 +1478,10 @@ static struct platform_driver rockchip_pcie_driver = {
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.pm = &rockchip_pcie_pm_ops,
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},
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.probe = rockchip_pcie_probe,
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.remove = rockchip_pcie_remove,
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};
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builtin_platform_driver(rockchip_pcie_driver);
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module_platform_driver(rockchip_pcie_driver);
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MODULE_AUTHOR("Rockchip Inc");
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MODULE_DESCRIPTION("Rockchip AXI PCIe driver");
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MODULE_LICENSE("GPL v2");
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@ -3383,6 +3383,7 @@ int __weak pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr)
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return -ENODEV;
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#endif
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}
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EXPORT_SYMBOL(pci_remap_iospace);
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/**
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* pci_unmap_iospace - Unmap the memory mapped I/O space
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@ -3400,6 +3401,7 @@ void pci_unmap_iospace(struct resource *res)
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unmap_kernel_range(vaddr, resource_size(res));
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#endif
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}
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EXPORT_SYMBOL(pci_unmap_iospace);
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static void __pci_set_master(struct pci_dev *dev, bool enable)
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{
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