[IA64-SGI] Add new MMR definitions/Modify BTE initialiation©.
patch 1: Add new MMR definitions. Modify BTE initialiation. Modify BTE copy. Signed-off-by: Russ Anderson <rja@sgi.com> Signed-off-by: Tony Luck <tony.luck@intel.com>
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2000-2003 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
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*/
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#include <linux/config.h>
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@ -170,10 +170,6 @@ retry_bteop:
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/* Initialize the notification to a known value. */
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*bte->most_rcnt_na = BTE_WORD_BUSY;
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/* Set the status reg busy bit and transfer length */
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BTE_PRINTKV(("IBLS = 0x%lx\n", IBLS_BUSY | transfer_size));
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BTE_LNSTAT_STORE(bte, IBLS_BUSY | transfer_size);
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/* Set the source and destination registers */
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BTE_PRINTKV(("IBSA = 0x%lx)\n", (TO_PHYS(src))));
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BTE_SRC_STORE(bte, TO_PHYS(src));
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@ -188,7 +184,7 @@ retry_bteop:
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/* Initiate the transfer */
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BTE_PRINTK(("IBCT = 0x%lx)\n", BTE_VALID_MODE(mode)));
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BTE_CTRL_STORE(bte, BTE_VALID_MODE(mode));
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BTE_START_TRANSFER(bte, transfer_size, BTE_VALID_MODE(mode));
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itc_end = ia64_get_itc() + (40000000 * local_cpu_data->cyc_per_usec);
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@ -429,10 +425,16 @@ void bte_init_node(nodepda_t * mynodepda, cnodeid_t cnode)
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mynodepda->bte_recovery_timer.data = (unsigned long)mynodepda;
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for (i = 0; i < BTES_PER_NODE; i++) {
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u64 *base_addr;
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/* Which link status register should we use? */
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unsigned long link_status = (i == 0 ? IIO_IBLS0 : IIO_IBLS1);
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mynodepda->bte_if[i].bte_base_addr = (u64 *)
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REMOTE_HUB_ADDR(cnodeid_to_nasid(cnode), link_status);
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base_addr = (u64 *)
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REMOTE_HUB_ADDR(cnodeid_to_nasid(cnode), BTE_BASE_ADDR(i));
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mynodepda->bte_if[i].bte_base_addr = base_addr;
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mynodepda->bte_if[i].bte_source_addr = BTE_SOURCE_ADDR(base_addr);
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mynodepda->bte_if[i].bte_destination_addr = BTE_DEST_ADDR(base_addr);
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mynodepda->bte_if[i].bte_control_addr = BTE_CTRL_ADDR(base_addr);
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mynodepda->bte_if[i].bte_notify_addr = BTE_NOTIF_ADDR(base_addr);
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/*
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* Initialize the notification and spinlock
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2000-2004 Silicon Graphics, Inc. All Rights Reserved.
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* Copyright (c) 2000-2005 Silicon Graphics, Inc. All Rights Reserved.
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*/
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@ -13,8 +13,12 @@
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#include <linux/timer.h>
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#include <linux/spinlock.h>
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#include <linux/cache.h>
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#include <asm/sn/pda.h>
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#include <asm/sn/types.h>
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#include <asm/sn/shub_mmr.h>
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#define IBCT_NOTIFY (0x1UL << 4)
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#define IBCT_ZFIL_MODE (0x1UL << 0)
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/* #define BTE_DEBUG */
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/* #define BTE_DEBUG_VERBOSE */
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@ -39,8 +43,36 @@
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/* Define hardware */
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#define BTES_PER_NODE 2
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#define BTES_PER_NODE (is_shub2() ? 4 : 2)
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#define MAX_BTES_PER_NODE 4
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#define BTE2OFF_CTRL (0)
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#define BTE2OFF_SRC (SH2_BT_ENG_SRC_ADDR_0 - SH2_BT_ENG_CSR_0)
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#define BTE2OFF_DEST (SH2_BT_ENG_DEST_ADDR_0 - SH2_BT_ENG_CSR_0)
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#define BTE2OFF_NOTIFY (SH2_BT_ENG_NOTIF_ADDR_0 - SH2_BT_ENG_CSR_0)
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#define BTE_BASE_ADDR(interface) \
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(is_shub2() ? (interface == 0) ? SH2_BT_ENG_CSR_0 : \
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(interface == 1) ? SH2_BT_ENG_CSR_1 : \
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(interface == 2) ? SH2_BT_ENG_CSR_2 : \
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SH2_BT_ENG_CSR_3 \
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: (interface == 0) ? IIO_IBLS0 : IIO_IBLS1)
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#define BTE_SOURCE_ADDR(base) \
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(is_shub2() ? base + (BTE2OFF_SRC/8) \
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: base + (BTEOFF_SRC/8))
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#define BTE_DEST_ADDR(base) \
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(is_shub2() ? base + (BTE2OFF_DEST/8) \
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: base + (BTEOFF_DEST/8))
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#define BTE_CTRL_ADDR(base) \
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(is_shub2() ? base + (BTE2OFF_CTRL/8) \
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: base + (BTEOFF_CTRL/8))
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#define BTE_NOTIF_ADDR(base) \
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(is_shub2() ? base + (BTE2OFF_NOTIFY/8) \
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: base + (BTEOFF_NOTIFY/8))
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/* Define hardware modes */
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#define BTE_NOTIFY (IBCT_NOTIFY)
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@ -68,14 +100,18 @@
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#define BTE_LNSTAT_STORE(_bte, _x) \
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HUB_S(_bte->bte_base_addr, (_x))
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#define BTE_SRC_STORE(_bte, _x) \
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HUB_S(_bte->bte_base_addr + (BTEOFF_SRC/8), (_x))
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HUB_S(_bte->bte_source_addr, (_x))
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#define BTE_DEST_STORE(_bte, _x) \
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HUB_S(_bte->bte_base_addr + (BTEOFF_DEST/8), (_x))
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HUB_S(_bte->bte_destination_addr, (_x))
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#define BTE_CTRL_STORE(_bte, _x) \
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HUB_S(_bte->bte_base_addr + (BTEOFF_CTRL/8), (_x))
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HUB_S(_bte->bte_control_addr, (_x))
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#define BTE_NOTIF_STORE(_bte, _x) \
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HUB_S(_bte->bte_base_addr + (BTEOFF_NOTIFY/8), (_x))
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HUB_S(_bte->bte_notify_addr, (_x))
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#define BTE_START_TRANSFER(_bte, _len, _mode) \
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is_shub2() ? BTE_CTRL_STORE(_bte, IBLS_BUSY | (_mode << 24) | _len) \
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: BTE_LNSTAT_STORE(_bte, _len); \
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BTE_CTRL_STORE(_bte, _mode)
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/* Possible results from bte_copy and bte_unaligned_copy */
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/* The following error codes map into the BTE hardware codes
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@ -110,6 +146,10 @@ typedef enum {
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struct bteinfo_s {
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volatile u64 notify ____cacheline_aligned;
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u64 *bte_base_addr ____cacheline_aligned;
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u64 *bte_source_addr;
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u64 *bte_destination_addr;
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u64 *bte_control_addr;
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u64 *bte_notify_addr;
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spinlock_t spinlock;
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cnodeid_t bte_cnode; /* cnode */
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int bte_error_count; /* Number of errors encountered */
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@ -117,6 +157,7 @@ struct bteinfo_s {
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int cleanup_active; /* Interface is locked for cleanup */
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volatile bte_result_t bh_error; /* error while processing */
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volatile u64 *most_rcnt_na;
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struct bteinfo_s *btes_to_try[MAX_BTES_PER_NODE];
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};
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_NODEPDA_H
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#define _ASM_IA64_SN_NODEPDA_H
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/*
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* The BTEs on this node are shared by the local cpus
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*/
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struct bteinfo_s bte_if[BTES_PER_NODE]; /* Virtual Interface */
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struct bteinfo_s bte_if[MAX_BTES_PER_NODE]; /* Virtual Interface */
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struct timer_list bte_recovery_timer;
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spinlock_t bte_recovery_lock;
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@ -3,7 +3,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 1992 - 1997, 2000-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_PDA_H
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#define _ASM_IA64_SN_PDA_H
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#include <linux/cache.h>
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#include <asm/percpu.h>
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#include <asm/system.h>
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#include <asm/sn/bte.h>
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/*
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@ -4,7 +4,7 @@
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
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* Copyright (c) 2001-2005 Silicon Graphics, Inc. All rights reserved.
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*/
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#ifndef _ASM_IA64_SN_SHUB_MMR_H
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#define SH_INT_CMPC shubmmr(SH, INT_CMPC)
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#define SH_INT_CMPD shubmmr(SH, INT_CMPD)
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/* ========================================================================== */
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/* Register "SH2_BT_ENG_CSR_0" */
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/* Engine 0 Control and Status Register */
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/* ========================================================================== */
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#define SH2_BT_ENG_CSR_0 0x0000000030040000
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#define SH2_BT_ENG_SRC_ADDR_0 0x0000000030040080
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#define SH2_BT_ENG_DEST_ADDR_0 0x0000000030040100
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#define SH2_BT_ENG_NOTIF_ADDR_0 0x0000000030040180
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/* ========================================================================== */
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/* BTE interfaces 1-3 */
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/* ========================================================================== */
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#define SH2_BT_ENG_CSR_1 0x0000000030050000
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#define SH2_BT_ENG_CSR_2 0x0000000030060000
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#define SH2_BT_ENG_CSR_3 0x0000000030070000
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#endif /* _ASM_IA64_SN_SHUB_MMR_H */
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