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MLK-20034-2: ARM64: dts: support DSD mode with ak4458 in imx8mm 

support DSD mode with ak4458 in imx8mm

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
pull/10/head
Shengjiu Wang 2018-10-23 16:14:28 +08:00 committed by Jason Liu
parent e101e57de0
commit 96133f3e7b
1 changed files with 22 additions and 1 deletions
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23
arch/arm64/boot/dts/freescale/fsl-imx8mm-evk.dts
View File

@ -273,6 +273,23 @@
>;
};
pinctrl_sai1_dsd: sai1grp_dsd {
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0xd6
MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 0xd6
MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0xd6
MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5 0xd6
MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6 0xd6
MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7 0xd6
>;
};
pinctrl_sai3: sai3grp {
fsl,pins = <
MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6
@ -820,8 +837,9 @@
};
&sai1 {
pinctrl-names = "default";
pinctrl-names = "default", "dsd";
pinctrl-0 = <&pinctrl_sai1>;
pinctrl-1 = <&pinctrl_sai1_dsd>;
assigned-clocks = <&clk IMX8MM_CLK_SAI1_SRC>,
<&clk IMX8MM_CLK_SAI1_DIV>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
@ -831,6 +849,9 @@
<&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>,
<&clk IMX8MM_AUDIO_PLL2_OUT>;
clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k";
fsl,sai-multi-lane;
fsl,dataline,dsd = <0xff 0x11>;
dmas = <&sdma2 0 26 0>, <&sdma2 1 26 0>;
status = "okay";
};