ARM: dts: exynos: Use human-friendly symbols for interrupt properties in exynos3250
Replace hard-coded values of type of GIC interrupt and its flags with respective macros from header to increase code readability. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
parent
c473c9a180
commit
9645ab2cbc
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@ -362,14 +362,14 @@
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interrupt-controller;
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
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<0 33 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
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<0 34 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>,
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<0 35 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>,
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<0 36 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>,
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<0 37 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>,
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<0 38 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>,
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<0 39 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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};
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};
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@ -379,14 +379,14 @@
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interrupt-controller;
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interrupt-controller;
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interrupt-parent = <&gic>;
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interrupt-parent = <&gic>;
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interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
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<0 41 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
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<0 42 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
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<0 43 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
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<0 44 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
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<0 45 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
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<0 46 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
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<0 47 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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};
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};
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@ -20,6 +20,7 @@
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#include "exynos4-cpu-thermal.dtsi"
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#include "exynos4-cpu-thermal.dtsi"
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#include "exynos-syscon-restart.dtsi"
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#include "exynos-syscon-restart.dtsi"
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#include <dt-bindings/clock/exynos3250.h>
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#include <dt-bindings/clock/exynos3250.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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/ {
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/ {
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@ -212,8 +213,8 @@
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rtc: rtc@10070000 {
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rtc: rtc@10070000 {
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compatible = "samsung,s3c6410-rtc";
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compatible = "samsung,s3c6410-rtc";
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reg = <0x10070000 0x100>;
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reg = <0x10070000 0x100>;
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interrupts = <0 73 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
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<0 74 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&pmu_system_controller>;
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interrupt-parent = <&pmu_system_controller>;
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status = "disabled";
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status = "disabled";
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};
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};
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@ -221,7 +222,7 @@
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tmu: tmu@100C0000 {
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tmu: tmu@100C0000 {
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compatible = "samsung,exynos3250-tmu";
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compatible = "samsung,exynos3250-tmu";
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reg = <0x100C0000 0x100>;
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reg = <0x100C0000 0x100>;
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interrupts = <0 216 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_TMU_APBIF>;
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clocks = <&cmu CLK_TMU_APBIF>;
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clock-names = "tmu_apbif";
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clock-names = "tmu_apbif";
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#include "exynos4412-tmu-sensor-conf.dtsi"
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#include "exynos4412-tmu-sensor-conf.dtsi"
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@ -236,20 +237,21 @@
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<0x10482000 0x1000>,
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<0x10482000 0x1000>,
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<0x10484000 0x2000>,
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<0x10484000 0x2000>,
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<0x10486000 0x2000>;
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<0x10486000 0x2000>;
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interrupts = <1 9 0xf04>;
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interrupts = <GIC_PPI 9
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(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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};
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};
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mct@10050000 {
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mct@10050000 {
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compatible = "samsung,exynos4210-mct";
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compatible = "samsung,exynos4210-mct";
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reg = <0x10050000 0x800>;
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reg = <0x10050000 0x800>;
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interrupts = <0 218 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
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<0 219 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
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<0 220 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>,
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<0 221 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>,
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<0 223 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
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<0 226 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
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<0 227 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>,
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<0 228 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
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clocks = <&cmu CLK_FIN_PLL>, <&cmu CLK_MCT>;
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clock-names = "fin_pll", "mct";
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clock-names = "fin_pll", "mct";
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};
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};
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@ -257,24 +259,24 @@
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pinctrl_1: pinctrl@11000000 {
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pinctrl_1: pinctrl@11000000 {
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compatible = "samsung,exynos3250-pinctrl";
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compatible = "samsung,exynos3250-pinctrl";
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reg = <0x11000000 0x1000>;
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reg = <0x11000000 0x1000>;
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interrupts = <0 225 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
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wakeup-interrupt-controller {
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wakeup-interrupt-controller {
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compatible = "samsung,exynos4210-wakeup-eint";
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compatible = "samsung,exynos4210-wakeup-eint";
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interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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};
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};
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pinctrl_0: pinctrl@11400000 {
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pinctrl_0: pinctrl@11400000 {
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compatible = "samsung,exynos3250-pinctrl";
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compatible = "samsung,exynos3250-pinctrl";
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reg = <0x11400000 0x1000>;
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reg = <0x11400000 0x1000>;
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interrupts = <0 240 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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jpeg: codec@11830000 {
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jpeg: codec@11830000 {
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compatible = "samsung,exynos3250-jpeg";
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compatible = "samsung,exynos3250-jpeg";
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reg = <0x11830000 0x1000>;
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reg = <0x11830000 0x1000>;
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interrupts = <0 171 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
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clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>;
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clock-names = "jpeg", "sclk";
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clock-names = "jpeg", "sclk";
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power-domains = <&pd_cam>;
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power-domains = <&pd_cam>;
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@ -288,8 +290,8 @@
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sysmmu_jpeg: sysmmu@11A60000 {
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sysmmu_jpeg: sysmmu@11A60000 {
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compatible = "samsung,exynos-sysmmu";
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compatible = "samsung,exynos-sysmmu";
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reg = <0x11a60000 0x1000>;
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reg = <0x11a60000 0x1000>;
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interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>,
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<0 161 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "sysmmu", "master";
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clock-names = "sysmmu", "master";
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clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
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clocks = <&cmu CLK_SMMUJPEG>, <&cmu CLK_JPEG>;
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power-domains = <&pd_cam>;
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power-domains = <&pd_cam>;
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@ -300,9 +302,9 @@
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compatible = "samsung,exynos3250-fimd";
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compatible = "samsung,exynos3250-fimd";
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reg = <0x11c00000 0x30000>;
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reg = <0x11c00000 0x30000>;
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interrupt-names = "fifo", "vsync", "lcd_sys";
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interrupt-names = "fifo", "vsync", "lcd_sys";
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interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
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<0 85 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
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<0 86 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
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clocks = <&cmu CLK_SCLK_FIMD0>, <&cmu CLK_FIMD0>;
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clock-names = "sclk_fimd", "fimd";
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clock-names = "sclk_fimd", "fimd";
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power-domains = <&pd_lcd0>;
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power-domains = <&pd_lcd0>;
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@ -314,7 +316,7 @@
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dsi_0: dsi@11C80000 {
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dsi_0: dsi@11C80000 {
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compatible = "samsung,exynos3250-mipi-dsi";
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compatible = "samsung,exynos3250-mipi-dsi";
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reg = <0x11C80000 0x10000>;
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reg = <0x11C80000 0x10000>;
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interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
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samsung,phy-type = <0>;
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samsung,phy-type = <0>;
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power-domains = <&pd_lcd0>;
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power-domains = <&pd_lcd0>;
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phys = <&mipi_phy 1>;
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phys = <&mipi_phy 1>;
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@ -329,8 +331,8 @@
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sysmmu_fimd0: sysmmu@11E20000 {
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sysmmu_fimd0: sysmmu@11E20000 {
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compatible = "samsung,exynos-sysmmu";
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compatible = "samsung,exynos-sysmmu";
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reg = <0x11e20000 0x1000>;
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reg = <0x11e20000 0x1000>;
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interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
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<0 81 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "sysmmu", "master";
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clock-names = "sysmmu", "master";
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clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
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clocks = <&cmu CLK_SMMUFIMD0>, <&cmu CLK_FIMD0>;
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power-domains = <&pd_lcd0>;
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power-domains = <&pd_lcd0>;
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@ -340,7 +342,7 @@
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hsotg: hsotg@12480000 {
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hsotg: hsotg@12480000 {
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compatible = "snps,dwc2";
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compatible = "snps,dwc2";
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reg = <0x12480000 0x20000>;
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reg = <0x12480000 0x20000>;
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interrupts = <0 141 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_USBOTG>;
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clocks = <&cmu CLK_USBOTG>;
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clock-names = "otg";
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clock-names = "otg";
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phys = <&exynos_usbphy 0>;
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phys = <&exynos_usbphy 0>;
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@ -351,7 +353,7 @@
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mshc_0: mshc@12510000 {
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mshc_0: mshc@12510000 {
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compatible = "samsung,exynos5420-dw-mshc";
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compatible = "samsung,exynos5420-dw-mshc";
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reg = <0x12510000 0x1000>;
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reg = <0x12510000 0x1000>;
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interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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clocks = <&cmu CLK_SDMMC0>, <&cmu CLK_SCLK_MMC0>;
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clock-names = "biu", "ciu";
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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fifo-depth = <0x80>;
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mshc_1: mshc@12520000 {
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mshc_1: mshc@12520000 {
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compatible = "samsung,exynos5420-dw-mshc";
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compatible = "samsung,exynos5420-dw-mshc";
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reg = <0x12520000 0x1000>;
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reg = <0x12520000 0x1000>;
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interrupts = <0 143 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
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clocks = <&cmu CLK_SDMMC1>, <&cmu CLK_SCLK_MMC1>;
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clock-names = "biu", "ciu";
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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fifo-depth = <0x80>;
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mshc_2: mshc@12530000 {
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mshc_2: mshc@12530000 {
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compatible = "samsung,exynos5250-dw-mshc";
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compatible = "samsung,exynos5250-dw-mshc";
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reg = <0x12530000 0x1000>;
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reg = <0x12530000 0x1000>;
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interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
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clocks = <&cmu CLK_SDMMC2>, <&cmu CLK_SCLK_MMC2>;
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clock-names = "biu", "ciu";
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clock-names = "biu", "ciu";
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fifo-depth = <0x80>;
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fifo-depth = <0x80>;
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pdma0: pdma@12680000 {
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pdma0: pdma@12680000 {
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compatible = "arm,pl330", "arm,primecell";
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x12680000 0x1000>;
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reg = <0x12680000 0x1000>;
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interrupts = <0 138 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_PDMA0>;
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clocks = <&cmu CLK_PDMA0>;
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clock-names = "apb_pclk";
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-cells = <1>;
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pdma1: pdma@12690000 {
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pdma1: pdma@12690000 {
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compatible = "arm,pl330", "arm,primecell";
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x12690000 0x1000>;
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reg = <0x12690000 0x1000>;
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interrupts = <0 139 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cmu CLK_PDMA1>;
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clocks = <&cmu CLK_PDMA1>;
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clock-names = "apb_pclk";
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-cells = <1>;
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compatible = "samsung,exynos3250-adc",
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compatible = "samsung,exynos3250-adc",
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"samsung,exynos-adc-v2";
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"samsung,exynos-adc-v2";
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reg = <0x126C0000 0x100>;
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reg = <0x126C0000 0x100>;
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interrupts = <0 137 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "adc", "sclk";
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clock-names = "adc", "sclk";
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clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
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clocks = <&cmu CLK_TSADC>, <&cmu CLK_SCLK_TSADC>;
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#io-channel-cells = <1>;
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#io-channel-cells = <1>;
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mfc: codec@13400000 {
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mfc: codec@13400000 {
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compatible = "samsung,mfc-v7";
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compatible = "samsung,mfc-v7";
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reg = <0x13400000 0x10000>;
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reg = <0x13400000 0x10000>;
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interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
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interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "mfc", "sclk_mfc";
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clock-names = "mfc", "sclk_mfc";
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clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
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clocks = <&cmu CLK_MFC>, <&cmu CLK_SCLK_MFC>;
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power-domains = <&pd_mfc>;
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power-domains = <&pd_mfc>;
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sysmmu_mfc: sysmmu@13620000 {
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sysmmu_mfc: sysmmu@13620000 {
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compatible = "samsung,exynos-sysmmu";
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compatible = "samsung,exynos-sysmmu";
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reg = <0x13620000 0x1000>;
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reg = <0x13620000 0x1000>;
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interrupts = <0 96 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<0 98 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clock-names = "sysmmu", "master";
|
clock-names = "sysmmu", "master";
|
||||||
clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
|
clocks = <&cmu CLK_SMMUMFC_L>, <&cmu CLK_MFC>;
|
||||||
power-domains = <&pd_mfc>;
|
power-domains = <&pd_mfc>;
|
||||||
|
@ -460,7 +462,7 @@
|
||||||
serial_0: serial@13800000 {
|
serial_0: serial@13800000 {
|
||||||
compatible = "samsung,exynos4210-uart";
|
compatible = "samsung,exynos4210-uart";
|
||||||
reg = <0x13800000 0x100>;
|
reg = <0x13800000 0x100>;
|
||||||
interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
|
clocks = <&cmu CLK_UART0>, <&cmu CLK_SCLK_UART0>;
|
||||||
clock-names = "uart", "clk_uart_baud0";
|
clock-names = "uart", "clk_uart_baud0";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -471,7 +473,7 @@
|
||||||
serial_1: serial@13810000 {
|
serial_1: serial@13810000 {
|
||||||
compatible = "samsung,exynos4210-uart";
|
compatible = "samsung,exynos4210-uart";
|
||||||
reg = <0x13810000 0x100>;
|
reg = <0x13810000 0x100>;
|
||||||
interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
|
clocks = <&cmu CLK_UART1>, <&cmu CLK_SCLK_UART1>;
|
||||||
clock-names = "uart", "clk_uart_baud0";
|
clock-names = "uart", "clk_uart_baud0";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -482,7 +484,7 @@
|
||||||
serial_2: serial@13820000 {
|
serial_2: serial@13820000 {
|
||||||
compatible = "samsung,exynos4210-uart";
|
compatible = "samsung,exynos4210-uart";
|
||||||
reg = <0x13820000 0x100>;
|
reg = <0x13820000 0x100>;
|
||||||
interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
|
clocks = <&cmu CLK_UART2>, <&cmu CLK_SCLK_UART2>;
|
||||||
clock-names = "uart", "clk_uart_baud0";
|
clock-names = "uart", "clk_uart_baud0";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -495,7 +497,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x13860000 0x100>;
|
reg = <0x13860000 0x100>;
|
||||||
interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C0>;
|
clocks = <&cmu CLK_I2C0>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -508,7 +510,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x13870000 0x100>;
|
reg = <0x13870000 0x100>;
|
||||||
interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C1>;
|
clocks = <&cmu CLK_I2C1>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -521,7 +523,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x13880000 0x100>;
|
reg = <0x13880000 0x100>;
|
||||||
interrupts = <0 115 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C2>;
|
clocks = <&cmu CLK_I2C2>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -534,7 +536,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x13890000 0x100>;
|
reg = <0x13890000 0x100>;
|
||||||
interrupts = <0 116 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C3>;
|
clocks = <&cmu CLK_I2C3>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -547,7 +549,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x138A0000 0x100>;
|
reg = <0x138A0000 0x100>;
|
||||||
interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C4>;
|
clocks = <&cmu CLK_I2C4>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -560,7 +562,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x138B0000 0x100>;
|
reg = <0x138B0000 0x100>;
|
||||||
interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C5>;
|
clocks = <&cmu CLK_I2C5>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -573,7 +575,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x138C0000 0x100>;
|
reg = <0x138C0000 0x100>;
|
||||||
interrupts = <0 119 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C6>;
|
clocks = <&cmu CLK_I2C6>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -586,7 +588,7 @@
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
compatible = "samsung,s3c2440-i2c";
|
compatible = "samsung,s3c2440-i2c";
|
||||||
reg = <0x138D0000 0x100>;
|
reg = <0x138D0000 0x100>;
|
||||||
interrupts = <0 120 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2C7>;
|
clocks = <&cmu CLK_I2C7>;
|
||||||
clock-names = "i2c";
|
clock-names = "i2c";
|
||||||
pinctrl-names = "default";
|
pinctrl-names = "default";
|
||||||
|
@ -597,7 +599,7 @@
|
||||||
spi_0: spi@13920000 {
|
spi_0: spi@13920000 {
|
||||||
compatible = "samsung,exynos4210-spi";
|
compatible = "samsung,exynos4210-spi";
|
||||||
reg = <0x13920000 0x100>;
|
reg = <0x13920000 0x100>;
|
||||||
interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
dmas = <&pdma0 7>, <&pdma0 6>;
|
dmas = <&pdma0 7>, <&pdma0 6>;
|
||||||
dma-names = "tx", "rx";
|
dma-names = "tx", "rx";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -613,7 +615,7 @@
|
||||||
spi_1: spi@13930000 {
|
spi_1: spi@13930000 {
|
||||||
compatible = "samsung,exynos4210-spi";
|
compatible = "samsung,exynos4210-spi";
|
||||||
reg = <0x13930000 0x100>;
|
reg = <0x13930000 0x100>;
|
||||||
interrupts = <0 122 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
dmas = <&pdma1 7>, <&pdma1 6>;
|
dmas = <&pdma1 7>, <&pdma1 6>;
|
||||||
dma-names = "tx", "rx";
|
dma-names = "tx", "rx";
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
|
@ -629,7 +631,7 @@
|
||||||
i2s2: i2s@13970000 {
|
i2s2: i2s@13970000 {
|
||||||
compatible = "samsung,s3c6410-i2s";
|
compatible = "samsung,s3c6410-i2s";
|
||||||
reg = <0x13970000 0x100>;
|
reg = <0x13970000 0x100>;
|
||||||
interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;
|
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
|
clocks = <&cmu CLK_I2S>, <&cmu CLK_SCLK_I2S>;
|
||||||
clock-names = "iis", "i2s_opclk0";
|
clock-names = "iis", "i2s_opclk0";
|
||||||
dmas = <&pdma0 14>, <&pdma0 13>;
|
dmas = <&pdma0 14>, <&pdma0 13>;
|
||||||
|
@ -642,19 +644,19 @@
|
||||||
pwm: pwm@139D0000 {
|
pwm: pwm@139D0000 {
|
||||||
compatible = "samsung,exynos4210-pwm";
|
compatible = "samsung,exynos4210-pwm";
|
||||||
reg = <0x139D0000 0x1000>;
|
reg = <0x139D0000 0x1000>;
|
||||||
interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<0 105 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<0 106 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<0 107 IRQ_TYPE_LEVEL_HIGH>,
|
<GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<0 108 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
#pwm-cells = <3>;
|
#pwm-cells = <3>;
|
||||||
status = "disabled";
|
status = "disabled";
|
||||||
};
|
};
|
||||||
|
|
||||||
pmu {
|
pmu {
|
||||||
compatible = "arm,cortex-a7-pmu";
|
compatible = "arm,cortex-a7-pmu";
|
||||||
interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>,
|
interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
<0 19 IRQ_TYPE_LEVEL_HIGH>;
|
<GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
};
|
};
|
||||||
|
|
||||||
ppmu_dmc0: ppmu_dmc0@106a0000 {
|
ppmu_dmc0: ppmu_dmc0@106a0000 {
|
||||||
|
|
Loading…
Reference in a new issue