[SCSI] qla2xxx: Properly handle 32 bit mailbox register for ISPFX00.
Signed-off-by: Giridhar Malavali <giridhar.malavali@qlogic.com> Signed-off-by: Saurav Kashyap <saurav.kashyap@qlogic.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@ -2916,9 +2916,9 @@ qlafx00_async_event(scsi_qla_host_t *vha)
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break;
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case QLAFX00_MBA_PORT_UPDATE: /* Port database update */
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ha->aenmb[1] = RD_REG_WORD(®->aenmailbox1);
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ha->aenmb[2] = RD_REG_WORD(®->aenmailbox2);
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ha->aenmb[3] = RD_REG_WORD(®->aenmailbox3);
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ha->aenmb[1] = RD_REG_DWORD(®->aenmailbox1);
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ha->aenmb[2] = RD_REG_DWORD(®->aenmailbox2);
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ha->aenmb[3] = RD_REG_DWORD(®->aenmailbox3);
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ql_dbg(ql_dbg_async, vha, 0x5077,
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"Asynchronous port Update received "
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"aenmb[0]: %x, aenmb[1]: %x, aenmb[2]: %x, aenmb[3]: %x\n",
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@ -2975,7 +2975,7 @@ static void
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qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
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{
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uint16_t cnt;
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uint16_t __iomem *wptr;
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uint32_t __iomem *wptr;
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struct qla_hw_data *ha = vha->hw;
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struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00;
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@ -2985,10 +2985,10 @@ qlafx00_mbx_completion(scsi_qla_host_t *vha, uint32_t mb0)
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/* Load return mailbox registers. */
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ha->flags.mbox_int = 1;
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ha->mailbox_out32[0] = mb0;
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wptr = (uint16_t __iomem *)®->mailbox17;
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wptr = (uint32_t __iomem *)®->mailbox17;
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for (cnt = 1; cnt < ha->mbx_count; cnt++) {
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ha->mailbox_out32[cnt] = RD_REG_WORD(wptr);
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ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr);
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wptr++;
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}
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}
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