ixgbe: fix ethtool register dump
1) reading some of the registers in our hardware causes them to clear, so don't read ICR in the ethtool register dump function. 2) several register iterators were not iterating Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -315,7 +315,9 @@ static void ixgbe_get_regs(struct net_device *netdev,
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regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
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/* Interrupt */
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regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICR);
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/* don't read EICR because it can clear interrupt causes, instead
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* read EICS which is a shadow but doesn't clear EICR */
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regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
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regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
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regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
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regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
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@ -419,7 +421,6 @@ static void ixgbe_get_regs(struct net_device *netdev,
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regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
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regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
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/* DCE */
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regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
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regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
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regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
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@ -539,21 +540,17 @@ static void ixgbe_get_regs(struct net_device *netdev,
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/* Diagnostic */
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regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
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for (i = 0; i < 8; i++)
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regs_buff[1072] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
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regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
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regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
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regs_buff[1081] = IXGBE_READ_REG(hw, IXGBE_RIC_DW0);
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regs_buff[1082] = IXGBE_READ_REG(hw, IXGBE_RIC_DW1);
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regs_buff[1083] = IXGBE_READ_REG(hw, IXGBE_RIC_DW2);
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regs_buff[1084] = IXGBE_READ_REG(hw, IXGBE_RIC_DW3);
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for (i = 0; i < 4; i++)
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regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
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regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
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regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
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for (i = 0; i < 8; i++)
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regs_buff[1087] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
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regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
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regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
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regs_buff[1096] = IXGBE_READ_REG(hw, IXGBE_TIC_DW0);
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regs_buff[1097] = IXGBE_READ_REG(hw, IXGBE_TIC_DW1);
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regs_buff[1098] = IXGBE_READ_REG(hw, IXGBE_TIC_DW2);
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regs_buff[1099] = IXGBE_READ_REG(hw, IXGBE_TIC_DW3);
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for (i = 0; i < 4; i++)
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regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
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regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
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regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
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regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
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@ -566,7 +563,7 @@ static void ixgbe_get_regs(struct net_device *netdev,
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regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
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regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
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for (i = 0; i < 8; i++)
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regs_buff[1111] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
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regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
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regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
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regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
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regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
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@ -278,18 +278,12 @@
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#define IXGBE_RDSTATCTL 0x02C20
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#define IXGBE_RDSTAT(_i) (0x02C00 + ((_i) * 4)) /* 0x02C00-0x02C1C */
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#define IXGBE_RDHMPN 0x02F08
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#define IXGBE_RIC_DW0 0x02F10
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#define IXGBE_RIC_DW1 0x02F14
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#define IXGBE_RIC_DW2 0x02F18
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#define IXGBE_RIC_DW3 0x02F1C
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#define IXGBE_RIC_DW(_i) (0x02F10 + ((_i) * 4))
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#define IXGBE_RDPROBE 0x02F20
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#define IXGBE_TDSTATCTL 0x07C20
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#define IXGBE_TDSTAT(_i) (0x07C00 + ((_i) * 4)) /* 0x07C00 - 0x07C1C */
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#define IXGBE_TDHMPN 0x07F08
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#define IXGBE_TIC_DW0 0x07F10
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#define IXGBE_TIC_DW1 0x07F14
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#define IXGBE_TIC_DW2 0x07F18
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#define IXGBE_TIC_DW3 0x07F1C
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#define IXGBE_TIC_DW(_i) (0x07F10 + ((_i) * 4))
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#define IXGBE_TDPROBE 0x07F20
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#define IXGBE_TXBUFCTRL 0x0C600
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#define IXGBE_TXBUFDATA0 0x0C610
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