mmc: mmc: extend the mmc_send_tuning()
The mmc_execute_tuning() has already prepared the opcode, there is no need to prepare it again at mmc_send_tuning(), and, there is a BUG of mmc_send_tuning() to determine the opcode by bus width, assume eMMC was running at HS200, 4bit mode, then the mmc_send_tuning() will overwrite the opcode from CMD21 to CMD19, then got error. in addition, extend an argument of "cmd_error" to allow getting if there was cmd error when tune response. Signed-off-by: Chaotian Jing <chaotian.jing@mediatek.com> [Ulf: Rebased patch] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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c9b5061e77
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@ -588,7 +588,7 @@ int mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value,
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}
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EXPORT_SYMBOL_GPL(mmc_switch);
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int mmc_send_tuning(struct mmc_host *host)
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int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error)
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{
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struct mmc_request mrq = {NULL};
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struct mmc_command cmd = {0};
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@ -598,16 +598,13 @@ int mmc_send_tuning(struct mmc_host *host)
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const u8 *tuning_block_pattern;
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int size, err = 0;
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u8 *data_buf;
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u32 opcode;
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if (ios->bus_width == MMC_BUS_WIDTH_8) {
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tuning_block_pattern = tuning_blk_pattern_8bit;
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size = sizeof(tuning_blk_pattern_8bit);
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opcode = MMC_SEND_TUNING_BLOCK_HS200;
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} else if (ios->bus_width == MMC_BUS_WIDTH_4) {
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tuning_block_pattern = tuning_blk_pattern_4bit;
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size = sizeof(tuning_blk_pattern_4bit);
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opcode = MMC_SEND_TUNING_BLOCK;
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} else
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return -EINVAL;
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@ -638,6 +635,9 @@ int mmc_send_tuning(struct mmc_host *host)
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mmc_wait_for_req(host, &mrq);
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if (cmd_error)
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*cmd_error = cmd.error;
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if (cmd.error) {
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err = cmd.error;
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goto out;
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@ -446,7 +446,7 @@ out:
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return loc;
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}
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static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot)
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static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
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{
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struct dw_mci *host = slot->host;
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struct dw_mci_exynos_priv_data *priv = host->priv;
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@ -461,7 +461,7 @@ static int dw_mci_exynos_execute_tuning(struct dw_mci_slot *slot)
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mci_writel(host, TMOUT, ~0);
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smpl = dw_mci_exynos_move_next_clksmpl(host);
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if (!mmc_send_tuning(mmc))
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if (!mmc_send_tuning(mmc, opcode, NULL))
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candiates |= (1 << smpl);
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} while (start_smpl != smpl);
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@ -83,7 +83,7 @@ static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios)
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#define NUM_PHASES 360
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#define TUNING_ITERATION_TO_PHASE(i) (DIV_ROUND_UP((i) * 360, NUM_PHASES))
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static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot)
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static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot, u32 opcode)
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{
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struct dw_mci *host = slot->host;
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struct dw_mci_rockchip_priv_data *priv = host->priv;
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@ -114,7 +114,7 @@ static int dw_mci_rk3288_execute_tuning(struct dw_mci_slot *slot)
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for (i = 0; i < NUM_PHASES; ) {
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clk_set_phase(priv->sample_clk, TUNING_ITERATION_TO_PHASE(i));
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v = !mmc_send_tuning(mmc);
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v = !mmc_send_tuning(mmc, opcode, NULL);
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if (i == 0)
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first_v = v;
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@ -1540,7 +1540,7 @@ static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode)
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int err = -EINVAL;
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if (drv_data && drv_data->execute_tuning)
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err = drv_data->execute_tuning(slot);
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err = drv_data->execute_tuning(slot, opcode);
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return err;
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}
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@ -290,7 +290,7 @@ struct dw_mci_drv_data {
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void (*prepare_command)(struct dw_mci *host, u32 *cmdr);
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void (*set_ios)(struct dw_mci *host, struct mmc_ios *ios);
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int (*parse_dt)(struct dw_mci *host);
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int (*execute_tuning)(struct dw_mci_slot *slot);
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int (*execute_tuning)(struct dw_mci_slot *slot, u32 opcode);
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int (*prepare_hs400_tuning)(struct dw_mci *host,
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struct mmc_ios *ios);
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int (*switch_voltage)(struct mmc_host *mmc,
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@ -759,7 +759,7 @@ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
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min = ESDHC_TUNE_CTRL_MIN;
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while (min < ESDHC_TUNE_CTRL_MAX) {
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esdhc_prepare_tuning(host, min);
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if (!mmc_send_tuning(host->mmc))
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if (!mmc_send_tuning(host->mmc, opcode, NULL))
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break;
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min += ESDHC_TUNE_CTRL_STEP;
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}
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@ -768,7 +768,7 @@ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
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max = min + ESDHC_TUNE_CTRL_STEP;
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while (max < ESDHC_TUNE_CTRL_MAX) {
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esdhc_prepare_tuning(host, max);
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if (mmc_send_tuning(host->mmc)) {
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if (mmc_send_tuning(host->mmc, opcode, NULL)) {
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max -= ESDHC_TUNE_CTRL_STEP;
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break;
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}
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@ -778,7 +778,7 @@ static int esdhc_executing_tuning(struct sdhci_host *host, u32 opcode)
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/* use average delay to get the best timing */
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avg = (min + max) / 2;
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esdhc_prepare_tuning(host, avg);
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ret = mmc_send_tuning(host->mmc);
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ret = mmc_send_tuning(host->mmc, opcode, NULL);
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esdhc_post_tuning(host);
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dev_dbg(mmc_dev(host->mmc), "tunning %s at 0x%x ret %d\n",
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@ -373,7 +373,7 @@ retry:
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if (rc)
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return rc;
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rc = mmc_send_tuning(mmc);
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rc = mmc_send_tuning(mmc, opcode, NULL);
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if (!rc) {
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/* Tuning is successful at this tuning point */
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tuned_phases[tuned_phase_cnt++] = phase;
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@ -98,7 +98,7 @@ retry:
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clock_setting | phase,
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SDHCI_CLK_DELAY_SETTING);
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if (!mmc_send_tuning(mmc)) {
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if (!mmc_send_tuning(mmc, opcode, NULL)) {
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/* Tuning is successful at this tuning point */
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tuned_phase_cnt++;
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dev_dbg(mmc_dev(mmc), "%s: Found good phase = %d\n",
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@ -153,7 +153,7 @@ extern int mmc_wait_for_app_cmd(struct mmc_host *, struct mmc_card *,
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struct mmc_command *, int);
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extern void mmc_start_bkops(struct mmc_card *card, bool from_exception);
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extern int mmc_switch(struct mmc_card *, u8, u8, u8, unsigned int);
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extern int mmc_send_tuning(struct mmc_host *host);
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extern int mmc_send_tuning(struct mmc_host *host, u32 opcode, int *cmd_error);
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extern int mmc_get_ext_csd(struct mmc_card *card, u8 **new_ext_csd);
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#define MMC_ERASE_ARG 0x00000000
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