Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: x86, gart: Make sure GART does not map physmem above 1TB x86, gart: Set DISTLBWALKPRB bit always x86, gart: Convert spaces to tabs in enable_gart_translation
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9d914b3ef3
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@ -66,7 +66,7 @@ static inline void gart_set_size_and_enable(struct pci_dev *dev, u32 order)
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* Don't enable translation but enable GART IO and CPU accesses.
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* Also, set DISTLBWALKPRB since GART tables memory is UC.
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*/
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ctl = DISTLBWALKPRB | order << 1;
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ctl = order << 1;
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pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
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}
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@ -75,17 +75,17 @@ static inline void enable_gart_translation(struct pci_dev *dev, u64 addr)
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{
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u32 tmp, ctl;
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/* address of the mappings table */
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addr >>= 12;
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tmp = (u32) addr<<4;
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tmp &= ~0xf;
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pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
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/* address of the mappings table */
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addr >>= 12;
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tmp = (u32) addr<<4;
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tmp &= ~0xf;
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pci_write_config_dword(dev, AMD64_GARTTABLEBASE, tmp);
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/* Enable GART translation for this hammer. */
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pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
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ctl |= GARTEN;
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ctl &= ~(DISGARTCPU | DISGARTIO);
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pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
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/* Enable GART translation for this hammer. */
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pci_read_config_dword(dev, AMD64_GARTAPERTURECTL, &ctl);
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ctl |= GARTEN | DISTLBWALKPRB;
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ctl &= ~(DISGARTCPU | DISGARTIO);
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pci_write_config_dword(dev, AMD64_GARTAPERTURECTL, ctl);
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}
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static inline int aperture_valid(u64 aper_base, u32 aper_size, u32 min_size)
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@ -499,7 +499,7 @@ out:
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* Don't enable translation yet but enable GART IO and CPU
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* accesses and set DISTLBWALKPRB since GART table memory is UC.
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*/
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u32 ctl = DISTLBWALKPRB | aper_order << 1;
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u32 ctl = aper_order << 1;
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bus = amd_nb_bus_dev_ranges[i].bus;
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dev_base = amd_nb_bus_dev_ranges[i].dev_base;
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@ -81,6 +81,9 @@ static u32 gart_unmapped_entry;
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#define AGPEXTERN
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#endif
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/* GART can only remap to physical addresses < 1TB */
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#define GART_MAX_PHYS_ADDR (1ULL << 40)
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/* backdoor interface to AGP driver */
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AGPEXTERN int agp_memory_reserved;
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AGPEXTERN __u32 *agp_gatt_table;
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@ -212,9 +215,13 @@ static dma_addr_t dma_map_area(struct device *dev, dma_addr_t phys_mem,
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size_t size, int dir, unsigned long align_mask)
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{
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unsigned long npages = iommu_num_pages(phys_mem, size, PAGE_SIZE);
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unsigned long iommu_page = alloc_iommu(dev, npages, align_mask);
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unsigned long iommu_page;
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int i;
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if (unlikely(phys_mem + size > GART_MAX_PHYS_ADDR))
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return bad_dma_addr;
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iommu_page = alloc_iommu(dev, npages, align_mask);
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if (iommu_page == -1) {
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if (!nonforced_iommu(dev, phys_mem, size))
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return phys_mem;
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