[POWERPC] 4xx: Add early udbg support for 40x processors
This adds some basic real mode based early udbg support for 40x in order to debug things more easily Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
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@ -227,6 +227,14 @@ config PPC_EARLY_DEBUG_44x
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Select this to enable early debugging for IBM 44x chips via the
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Select this to enable early debugging for IBM 44x chips via the
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inbuilt serial port.
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inbuilt serial port.
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config PPC_EARLY_DEBUG_40x
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bool "Early serial debugging for IBM/AMCC 40x CPUs"
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depends on 40x
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help
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Select this to enable early debugging for IBM 40x chips via the
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inbuilt serial port. This works on chips with a 16550 compatible
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UART. Xilinx chips with uartlite cannot use this option.
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config PPC_EARLY_DEBUG_CPM
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config PPC_EARLY_DEBUG_CPM
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bool "Early serial debugging for Freescale CPM-based serial ports"
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bool "Early serial debugging for Freescale CPM-based serial ports"
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depends on SERIAL_CPM
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depends on SERIAL_CPM
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@ -248,6 +256,11 @@ config PPC_EARLY_DEBUG_44x_PHYSHIGH
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depends on PPC_EARLY_DEBUG_44x
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depends on PPC_EARLY_DEBUG_44x
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default "0x1"
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default "0x1"
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config PPC_EARLY_DEBUG_40x_PHYSADDR
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hex "Early debug UART physical address"
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depends on PPC_EARLY_DEBUG_40x
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default "0xef600300"
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config PPC_EARLY_DEBUG_CPM_ADDR
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config PPC_EARLY_DEBUG_CPM_ADDR
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hex "CPM UART early debug transmit descriptor address"
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hex "CPM UART early debug transmit descriptor address"
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depends on PPC_EARLY_DEBUG_CPM
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depends on PPC_EARLY_DEBUG_CPM
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@ -206,6 +206,45 @@ _GLOBAL(_nmask_and_or_msr)
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isync
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isync
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blr /* Done */
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blr /* Done */
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#ifdef CONFIG_40x
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/*
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* Do an IO access in real mode
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*/
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_GLOBAL(real_readb)
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mfmsr r7
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ori r0,r7,MSR_DR
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xori r0,r0,MSR_DR
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sync
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mtmsr r0
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sync
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isync
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lbz r3,0(r3)
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sync
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mtmsr r7
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sync
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isync
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blr
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/*
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* Do an IO access in real mode
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*/
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_GLOBAL(real_writeb)
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mfmsr r7
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ori r0,r7,MSR_DR
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xori r0,r0,MSR_DR
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sync
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mtmsr r0
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sync
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isync
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stb r3,0(r4)
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sync
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mtmsr r7
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sync
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isync
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blr
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#endif /* CONFIG_40x */
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/*
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/*
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* Flush MMU TLB
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* Flush MMU TLB
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@ -54,6 +54,9 @@ void __init udbg_early_init(void)
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#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
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#elif defined(CONFIG_PPC_EARLY_DEBUG_44x)
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/* PPC44x debug */
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/* PPC44x debug */
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udbg_init_44x_as1();
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udbg_init_44x_as1();
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#elif defined(CONFIG_PPC_EARLY_DEBUG_40x)
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/* PPC40x debug */
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udbg_init_40x_realmode();
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#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
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#elif defined(CONFIG_PPC_EARLY_DEBUG_CPM)
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udbg_init_cpm();
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udbg_init_cpm();
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#endif
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#endif
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@ -225,3 +225,36 @@ void __init udbg_init_44x_as1(void)
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udbg_getc = udbg_44x_as1_getc;
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udbg_getc = udbg_44x_as1_getc;
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}
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}
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#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
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#endif /* CONFIG_PPC_EARLY_DEBUG_44x */
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#ifdef CONFIG_PPC_EARLY_DEBUG_40x
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static void udbg_40x_real_putc(char c)
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{
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if (udbg_comport) {
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while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
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/* wait for idle */;
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real_writeb(c, &udbg_comport->thr); eieio();
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if (c == '\n')
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udbg_40x_real_putc('\r');
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}
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}
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static int udbg_40x_real_getc(void)
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{
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if (udbg_comport) {
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while ((real_readb(&udbg_comport->lsr) & LSR_DR) == 0)
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; /* wait for char */
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return real_readb(&udbg_comport->rbr);
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}
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return -1;
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}
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void __init udbg_init_40x_realmode(void)
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{
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udbg_comport = (struct NS16550 __iomem *)
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CONFIG_PPC_EARLY_DEBUG_40x_PHYSADDR;
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udbg_putc = udbg_40x_real_putc;
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udbg_getc = udbg_40x_real_getc;
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udbg_getc_poll = NULL;
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}
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#endif /* CONFIG_PPC_EARLY_DEBUG_40x */
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@ -43,6 +43,7 @@ config 40x
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bool "AMCC 40x"
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bool "AMCC 40x"
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select PPC_DCR_NATIVE
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select PPC_DCR_NATIVE
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select WANT_DEVICE_TREE
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select WANT_DEVICE_TREE
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select PPC_UDBG_16550
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config 44x
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config 44x
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bool "AMCC 44x"
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bool "AMCC 44x"
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@ -48,6 +48,7 @@ extern void __init udbg_init_rtas_console(void);
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extern void __init udbg_init_debug_beat(void);
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extern void __init udbg_init_debug_beat(void);
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extern void __init udbg_init_btext(void);
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extern void __init udbg_init_btext(void);
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extern void __init udbg_init_44x_as1(void);
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extern void __init udbg_init_44x_as1(void);
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extern void __init udbg_init_40x_realmode(void);
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extern void __init udbg_init_cpm(void);
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extern void __init udbg_init_cpm(void);
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#endif /* __KERNEL__ */
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#endif /* __KERNEL__ */
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