VT-d: cleanup iommu_flush_iotlb_psi and flush_unmaps
Make iommu_flush_iotlb_psi() and flush_unmaps() more readable. Signed-off-by: Yu Zhao <yu.zhao@intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -948,27 +948,22 @@ static void __iommu_flush_iotlb(struct intel_iommu *iommu, u16 did,
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static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, u16 did,
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u64 addr, unsigned int pages)
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{
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unsigned int mask;
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unsigned int mask = ilog2(__roundup_pow_of_two(pages));
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BUG_ON(addr & (~VTD_PAGE_MASK));
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BUG_ON(pages == 0);
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/* Fallback to domain selective flush if no PSI support */
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if (!cap_pgsel_inv(iommu->cap))
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return iommu->flush.flush_iotlb(iommu, did, 0, 0,
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DMA_TLB_DSI_FLUSH);
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/*
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* Fallback to domain selective flush if no PSI support or the size is
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* too big.
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* PSI requires page size to be 2 ^ x, and the base address is naturally
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* aligned to the size
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*/
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mask = ilog2(__roundup_pow_of_two(pages));
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/* Fallback to domain selective flush if size is too big */
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if (mask > cap_max_amask_val(iommu->cap))
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return iommu->flush.flush_iotlb(iommu, did, 0, 0,
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if (!cap_pgsel_inv(iommu->cap) || mask > cap_max_amask_val(iommu->cap))
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iommu->flush.flush_iotlb(iommu, did, 0, 0,
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DMA_TLB_DSI_FLUSH);
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return iommu->flush.flush_iotlb(iommu, did, addr, mask,
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else
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iommu->flush.flush_iotlb(iommu, did, addr, mask,
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DMA_TLB_PSI_FLUSH);
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}
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@ -2260,16 +2255,17 @@ static void flush_unmaps(void)
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if (!iommu)
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continue;
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if (deferred_flush[i].next) {
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if (!deferred_flush[i].next)
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continue;
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iommu->flush.flush_iotlb(iommu, 0, 0, 0,
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DMA_TLB_GLOBAL_FLUSH);
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DMA_TLB_GLOBAL_FLUSH, 0);
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for (j = 0; j < deferred_flush[i].next; j++) {
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__free_iova(&deferred_flush[i].domain[j]->iovad,
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deferred_flush[i].iova[j]);
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}
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deferred_flush[i].next = 0;
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}
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}
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list_size = 0;
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}
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