[IA64] add sn_register_pmi_handler oemcall

Add wrapper function to make SN_SAL_REGISTER_PMI_HANDLER ia64_sal_oemcall.

Signed-off-by: Dean Nelson <dcn@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Dean Nelson 2007-07-11 10:22:16 -05:00 committed by Tony Luck
parent c6255e9865
commit 9e121327b3

View file

@ -32,6 +32,7 @@
#define SN_SAL_NO_FAULT_ZONE_VIRTUAL 0x02000010
#define SN_SAL_NO_FAULT_ZONE_PHYSICAL 0x02000011
#define SN_SAL_PRINT_ERROR 0x02000012
#define SN_SAL_REGISTER_PMI_HANDLER 0x02000014
#define SN_SAL_SET_ERROR_HANDLING_FEATURES 0x0200001a // reentrant
#define SN_SAL_GET_FIT_COMPT 0x0200001b // reentrant
#define SN_SAL_GET_SAPIC_INFO 0x0200001d
@ -679,6 +680,25 @@ sn_register_nofault_code(u64 start_addr, u64 end_addr, u64 return_addr,
return ret_stuff.status;
}
/*
* Register or unregister a function to handle a PMI received by a CPU.
* Before calling the registered handler, SAL sets r1 to the value that
* was passed in as the global_pointer.
*
* If the handler pointer is NULL, then the currently registered handler
* will be unregistered.
*
* Returns 0 on success, or a negative value if an error occurred.
*/
static inline int
sn_register_pmi_handler(u64 handler, u64 global_pointer)
{
struct ia64_sal_retval ret_stuff;
ia64_sal_oemcall(&ret_stuff, SN_SAL_REGISTER_PMI_HANDLER, handler,
global_pointer, 0, 0, 0, 0, 0);
return ret_stuff.status;
}
/*
* Change or query the coherence domain for this partition. Each cpu-based
* nasid is represented by a bit in an array of 64-bit words: