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Merge tag 'topic/drm-misc-2016-09-19' of git://anongit.freedesktop.org/drm-intel into drm-next 

Just random misc stuff that Sean/Sumit&Archit picked up while I relaxed.
Well except for one commit:

* tag 'topic/drm-misc-2016-09-19' of git://anongit.freedesktop.org/drm-intel:
  drm: Only use compat ioctl for addfb2 on X86/IA64
  drm/qxl: squash lines for simple wrapper functions
  drm/bridge: analogix_dp: squash lines for simple wrapper functions
  drm/radeon: squash lines for simple wrapper functions
  drm/amdgpu: squash lines for simple wrapper functions
  dma-buf/sync-file: Avoid enable fence signaling if poll(.timeout=0)
  drm/fence: allow fence waiting to be interrupted by userspace
  drm: Move property validation to a helper, v2.
  drm/bridge: adv7511: add support for the 2nd chip
steinar/wifi_calib_4_9_kernel
Dave Airlie 2016-09-19 17:16:02 +10:00
parent 8506912b96 a988588b18
commit 9f8cf165c6
19 changed files with 84 additions and 104 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
drivers/dma-buf/sync_file.c
View File

@ -306,7 +306,8 @@ static unsigned int sync_file_poll(struct file *file, poll_table *wait)
poll_wait(file, &sync_file->wq, wait);
if (!test_and_set_bit(POLL_ENABLED, &sync_file->fence->flags)) {
if (!poll_does_not_wait(wait) &&
!test_and_set_bit(POLL_ENABLED, &sync_file->fence->flags)) {
if (fence_add_callback(sync_file->fence, &sync_file->cb,
fence_check_cb_func) < 0)
wake_up_all(&sync_file->wq);

6
drivers/gpu/drm/amd/amdgpu/dce_virtual.c
View File

@ -466,11 +466,7 @@ static int dce_virtual_suspend(void *handle)
static int dce_virtual_resume(void *handle)
{
int ret;
ret = dce_virtual_hw_init(handle);
return ret;
return dce_virtual_hw_init(handle);
}
static bool dce_virtual_is_idle(void *handle)

6
drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
View File

@ -190,12 +190,8 @@ out:
*/
static uint32_t sdma_v2_4_ring_get_rptr(struct amdgpu_ring *ring)
{
u32 rptr;
/* XXX check if swapping is necessary on BE */
rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;
return rptr;
return ring->adev->wb.wb[ring->rptr_offs] >> 2;
}
/**

6
drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
View File

@ -335,12 +335,8 @@ out:
*/
static uint32_t sdma_v3_0_ring_get_rptr(struct amdgpu_ring *ring)
{
u32 rptr;
/* XXX check if swapping is necessary on BE */
rptr = ring->adev->wb.wb[ring->rptr_offs] >> 2;
return rptr;
return ring->adev->wb.wb[ring->rptr_offs] >> 2;
}
/**

12
drivers/gpu/drm/bridge/adv7511/adv7511_drv.c
View File

@ -922,15 +922,13 @@ static int adv7511_parse_dt(struct device_node *np,
return 0;
}
static const int edid_i2c_addr = 0x7e;
static const int packet_i2c_addr = 0x70;
static const int cec_i2c_addr = 0x78;
static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
{
struct adv7511_link_config link_config;
struct adv7511 *adv7511;
struct device *dev = &i2c->dev;
unsigned int main_i2c_addr = i2c->addr << 1;
unsigned int edid_i2c_addr = main_i2c_addr + 4;
unsigned int val;
int ret;
@ -991,8 +989,10 @@ static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
packet_i2c_addr);
regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR, cec_i2c_addr);
main_i2c_addr - 0xa);
regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR,
main_i2c_addr - 2);
adv7511_packet_disable(adv7511, 0xffff);
adv7511->i2c_main = i2c;

5
drivers/gpu/drm/bridge/adv7511/adv7533.c
View File

@ -149,13 +149,12 @@ void adv7533_uninit_cec(struct adv7511 *adv)
i2c_unregister_device(adv->i2c_cec);
}
static const int cec_i2c_addr = 0x78;
int adv7533_init_cec(struct adv7511 *adv)
{
int ret;
adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter, cec_i2c_addr >> 1);
adv->i2c_cec = i2c_new_dummy(adv->i2c_main->adapter,
adv->i2c_main->addr - 1);
if (!adv->i2c_cec)
return -ENOMEM;

20
drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c
View File

@ -1073,34 +1073,22 @@ void analogix_dp_set_lane3_link_training(struct analogix_dp_device *dp,
u32 analogix_dp_get_lane0_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
return reg;
return readl(dp->reg_base + ANALOGIX_DP_LN0_LINK_TRAINING_CTL);
}
u32 analogix_dp_get_lane1_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
return reg;
return readl(dp->reg_base + ANALOGIX_DP_LN1_LINK_TRAINING_CTL);
}
u32 analogix_dp_get_lane2_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
return reg;
return readl(dp->reg_base + ANALOGIX_DP_LN2_LINK_TRAINING_CTL);
}
u32 analogix_dp_get_lane3_link_training(struct analogix_dp_device *dp)
{
u32 reg;
reg = readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
return reg;
return readl(dp->reg_base + ANALOGIX_DP_LN3_LINK_TRAINING_CTL);
}
void analogix_dp_reset_macro(struct analogix_dp_device *dp)

13
drivers/gpu/drm/drm_atomic.c
View File

@ -1609,7 +1609,7 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
struct drm_crtc_state *crtc_state;
unsigned plane_mask;
int ret = 0;
unsigned int i, j, k;
unsigned int i, j;
/* disallow for drivers not supporting atomic: */
if (!drm_core_check_feature(dev, DRIVER_ATOMIC))
@ -1691,16 +1691,7 @@ retry:
goto out;
}
for (k = 0; k < obj->properties->count; k++)
if (obj->properties->properties[k]->base.id == prop_id)
break;
if (k == obj->properties->count) {
ret = -EINVAL;
goto out;
}
prop = drm_property_find(dev, prop_id);
prop = drm_mode_obj_find_prop_id(obj, prop_id);
if (!prop) {
drm_mode_object_unreference(obj);
ret = -ENOENT;

41
drivers/gpu/drm/drm_atomic_helper.c
View File

@ -1009,29 +1009,46 @@ EXPORT_SYMBOL(drm_atomic_helper_commit_modeset_enables);
* drm_atomic_helper_wait_for_fences - wait for fences stashed in plane state
* @dev: DRM device
* @state: atomic state object with old state structures
* @pre_swap: if true, do an interruptible wait
*
* For implicit sync, driver should fish the exclusive fence out from the
* incoming fb's and stash it in the drm_plane_state. This is called after
* drm_atomic_helper_swap_state() so it uses the current plane state (and
* just uses the atomic state to find the changed planes)
*
* Returns zero if success or < 0 if fence_wait() fails.
*/
void drm_atomic_helper_wait_for_fences(struct drm_device *dev,
struct drm_atomic_state *state)
int drm_atomic_helper_wait_for_fences(struct drm_device *dev,
struct drm_atomic_state *state,
bool pre_swap)
{
struct drm_plane *plane;
struct drm_plane_state *plane_state;
int i;
int i, ret;
for_each_plane_in_state(state, plane, plane_state, i) {
if (!plane->state->fence)
if (!pre_swap)
plane_state = plane->state;
if (!plane_state->fence)
continue;
WARN_ON(!plane->state->fb);
WARN_ON(!plane_state->fb);
fence_wait(plane->state->fence, false);
fence_put(plane->state->fence);
plane->state->fence = NULL;
/*
* If waiting for fences pre-swap (ie: nonblock), userspace can
* still interrupt the operation. Instead of blocking until the
* timer expires, make the wait interruptible.
*/
ret = fence_wait(plane_state->fence, pre_swap);
if (ret)
return ret;
fence_put(plane_state->fence);
plane_state->fence = NULL;
}
return 0;
}
EXPORT_SYMBOL(drm_atomic_helper_wait_for_fences);
@ -1179,7 +1196,7 @@ static void commit_tail(struct drm_atomic_state *state)
funcs = dev->mode_config.helper_private;
drm_atomic_helper_wait_for_fences(dev, state);
drm_atomic_helper_wait_for_fences(dev, state, false);
drm_atomic_helper_wait_for_dependencies(state);
@ -1238,6 +1255,12 @@ int drm_atomic_helper_commit(struct drm_device *dev,
if (ret)
return ret;
if (!nonblock) {
ret = drm_atomic_helper_wait_for_fences(dev, state, true);
if (ret)
return ret;
}
/*
* This is the point of no return - everything below never fails except
* when the hw goes bonghits. Which means we can commit the new state on

2
drivers/gpu/drm/drm_crtc_internal.h
View File

@ -115,6 +115,8 @@ int drm_mode_object_get_properties(struct drm_mode_object *obj, bool atomic,
uint32_t __user *prop_ptr,
uint64_t __user *prop_values,
uint32_t *arg_count_props);
struct drm_property *drm_mode_obj_find_prop_id(struct drm_mode_object *obj,
uint32_t prop_id);
/* IOCTL */

4
drivers/gpu/drm/drm_ioc32.c
View File

@ -1016,6 +1016,7 @@ static int compat_drm_wait_vblank(struct file *file, unsigned int cmd,
return 0;
}
#if defined(CONFIG_X86) || defined(CONFIG_IA64)
typedef struct drm_mode_fb_cmd232 {
u32 fb_id;
u32 width;
@ -1072,6 +1073,7 @@ static int compat_drm_mode_addfb2(struct file *file, unsigned int cmd,
return 0;
}
#endif
static drm_ioctl_compat_t *drm_compat_ioctls[] = {
[DRM_IOCTL_NR(DRM_IOCTL_VERSION32)] = compat_drm_version,
@ -1105,7 +1107,9 @@ static drm_ioctl_compat_t *drm_compat_ioctls[] = {
[DRM_IOCTL_NR(DRM_IOCTL_UPDATE_DRAW32)] = compat_drm_update_draw,
#endif
[DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK32)] = compat_drm_wait_vblank,
#if defined(CONFIG_X86) || defined(CONFIG_IA64)
[DRM_IOCTL_NR(DRM_IOCTL_MODE_ADDFB232)] = compat_drm_mode_addfb2,
#endif
};
/**

31
drivers/gpu/drm/drm_mode_object.c
View File

@ -372,14 +372,25 @@ out:
return ret;
}
struct drm_property *drm_mode_obj_find_prop_id(struct drm_mode_object *obj,
uint32_t prop_id)
{
int i;
for (i = 0; i < obj->properties->count; i++)
if (obj->properties->properties[i]->base.id == prop_id)
return obj->properties->properties[i];
return NULL;
}
int drm_mode_obj_set_property_ioctl(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
struct drm_mode_obj_set_property *arg = data;
struct drm_mode_object *arg_obj;
struct drm_mode_object *prop_obj;
struct drm_property *property;
int i, ret = -EINVAL;
int ret = -EINVAL;
struct drm_mode_object *ref;
if (!drm_core_check_feature(dev, DRIVER_MODESET))
@ -392,24 +403,14 @@ int drm_mode_obj_set_property_ioctl(struct drm_device *dev, void *data,
ret = -ENOENT;
goto out;
}
if (!arg_obj->properties)
goto out_unref;
for (i = 0; i < arg_obj->properties->count; i++)
if (arg_obj->properties->properties[i]->base.id == arg->prop_id)
break;
if (i == arg_obj->properties->count)
property = drm_mode_obj_find_prop_id(arg_obj, arg->prop_id);
if (!property)
goto out_unref;
prop_obj = drm_mode_object_find(dev, arg->prop_id,
DRM_MODE_OBJECT_PROPERTY);
if (!prop_obj) {
ret = -ENOENT;
goto out_unref;
}
property = obj_to_property(prop_obj);
if (!drm_property_change_valid_get(property, arg->value, &ref))
goto out_unref;

2
drivers/gpu/drm/msm/msm_atomic.c
View File

@ -112,7 +112,7 @@ static void complete_commit(struct msm_commit *c, bool async)
struct msm_drm_private *priv = dev->dev_private;
struct msm_kms *kms = priv->kms;
drm_atomic_helper_wait_for_fences(dev, state);
drm_atomic_helper_wait_for_fences(dev, state, false);
kms->funcs->prepare_commit(kms, state);

7
drivers/gpu/drm/qxl/qxl_draw.c
View File

@ -57,11 +57,8 @@ static struct qxl_rect *drawable_set_clipping(struct qxl_device *qdev,
static int
alloc_drawable(struct qxl_device *qdev, struct qxl_release **release)
{
int ret;
ret = qxl_alloc_release_reserved(qdev, sizeof(struct qxl_drawable),
QXL_RELEASE_DRAWABLE, release,
NULL);
return ret;
return qxl_alloc_release_reserved(qdev, sizeof(struct qxl_drawable),
QXL_RELEASE_DRAWABLE, release, NULL);
}
static void

7
drivers/gpu/drm/qxl/qxl_release.c
View File

@ -203,12 +203,9 @@ qxl_release_free(struct qxl_device *qdev,
static int qxl_release_bo_alloc(struct qxl_device *qdev,
struct qxl_bo **bo)
{
int ret;
/* pin releases bo's they are too messy to evict */
ret = qxl_bo_create(qdev, PAGE_SIZE, false, true,
QXL_GEM_DOMAIN_VRAM, NULL,
bo);
return ret;
return qxl_bo_create(qdev, PAGE_SIZE, false, true,
QXL_GEM_DOMAIN_VRAM, NULL, bo);
}
int qxl_release_list_add(struct qxl_release *release, struct qxl_bo *bo)

6
drivers/gpu/drm/radeon/cik.c
View File

@ -4193,11 +4193,7 @@ u32 cik_gfx_get_rptr(struct radeon_device *rdev,
u32 cik_gfx_get_wptr(struct radeon_device *rdev,
struct radeon_ring *ring)
{
u32 wptr;
wptr = RREG32(CP_RB0_WPTR);
return wptr;
return RREG32(CP_RB0_WPTR);
}
void cik_gfx_set_wptr(struct radeon_device *rdev,

6
drivers/gpu/drm/radeon/r100.c
View File

@ -1071,11 +1071,7 @@ u32 r100_gfx_get_rptr(struct radeon_device *rdev,
u32 r100_gfx_get_wptr(struct radeon_device *rdev,
struct radeon_ring *ring)
{
u32 wptr;
wptr = RREG32(RADEON_CP_RB_WPTR);
return wptr;
return RREG32(RADEON_CP_RB_WPTR);
}
void r100_gfx_set_wptr(struct radeon_device *rdev,

6
drivers/gpu/drm/radeon/r600.c
View File

@ -2631,11 +2631,7 @@ u32 r600_gfx_get_rptr(struct radeon_device *rdev,
u32 r600_gfx_get_wptr(struct radeon_device *rdev,
struct radeon_ring *ring)
{
u32 wptr;
wptr = RREG32(R600_CP_RB_WPTR);
return wptr;
return RREG32(R600_CP_RB_WPTR);
}
void r600_gfx_set_wptr(struct radeon_device *rdev,

5
include/drm/drm_atomic_helper.h
View File

@ -45,8 +45,9 @@ int drm_atomic_helper_commit(struct drm_device *dev,
struct drm_atomic_state *state,
bool nonblock);
void drm_atomic_helper_wait_for_fences(struct drm_device *dev,
struct drm_atomic_state *state);
int drm_atomic_helper_wait_for_fences(struct drm_device *dev,
struct drm_atomic_state *state,
bool pre_swap);
bool drm_atomic_helper_framebuffer_changed(struct drm_device *dev,
struct drm_atomic_state *old_state,
struct drm_crtc *crtc);