spi: sh-msiof: Convert to use GPIO descriptors
Convert GPIO chip selects in the Renesas MSIOF SPI driver from legacy GPIO numbers to GPIO descriptors. Notes: - The board file for the SH7724-based Ecovec24 development board now registers a GPIO descriptor lookup, instead of passing a GPIO number through controller_data, - sh_msiof_get_cs_gpios() must release all GPIOs, else spi_get_gpio_descs() cannot claim them during SPI controller registration. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -806,7 +806,6 @@ static struct spi_board_info spi_bus[] = {
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.platform_data = &mmc_spi_info,
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.max_speed_hz = 5000000,
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.mode = SPI_MODE_0,
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.controller_data = (void *) GPIO_PTM4,
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},
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};
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@ -838,6 +837,14 @@ static struct platform_device msiof0_device = {
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.resource = msiof0_resources,
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};
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static struct gpiod_lookup_table msiof_gpio_table = {
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.dev_id = "spi_sh_msiof.0",
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.table = {
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GPIO_LOOKUP("sh7724_pfc", GPIO_PTM4, "cs", GPIO_ACTIVE_HIGH),
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{ },
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},
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};
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#endif
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/* FSI */
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@ -1296,12 +1303,11 @@ static int __init arch_setup(void)
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gpio_request(GPIO_FN_MSIOF0_TXD, NULL);
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gpio_request(GPIO_FN_MSIOF0_RXD, NULL);
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gpio_request(GPIO_FN_MSIOF0_TSCK, NULL);
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gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */
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gpio_direction_output(GPIO_PTM4, 1); /* active low CS */
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gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */
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gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */
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gpiod_add_lookup_table(&mmc_spi_gpio_table);
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gpiod_add_lookup_table(&msiof_gpio_table);
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spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
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#endif
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@ -549,25 +549,11 @@ static void sh_msiof_spi_read_fifo_s32u(struct sh_msiof_spi_priv *p,
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static int sh_msiof_spi_setup(struct spi_device *spi)
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{
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struct device_node *np = spi->controller->dev.of_node;
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struct sh_msiof_spi_priv *p =
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spi_controller_get_devdata(spi->controller);
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u32 clr, set, tmp;
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if (!np) {
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/*
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* Use spi->controller_data for CS (same strategy as spi_gpio),
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* if any. otherwise let HW control CS
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*/
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spi->cs_gpio = (uintptr_t)spi->controller_data;
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}
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if (gpio_is_valid(spi->cs_gpio)) {
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gpio_direction_output(spi->cs_gpio, !(spi->mode & SPI_CS_HIGH));
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return 0;
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}
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if (spi_controller_is_slave(p->ctlr))
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if (spi->cs_gpiod || spi_controller_is_slave(p->ctlr))
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return 0;
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if (p->native_cs_inited &&
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@ -600,7 +586,7 @@ static int sh_msiof_prepare_message(struct spi_controller *ctlr,
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u32 ss, cs_high;
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/* Configure pins before asserting CS */
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if (gpio_is_valid(spi->cs_gpio)) {
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if (spi->cs_gpiod) {
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ss = p->unused_ss;
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cs_high = p->native_cs_high;
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} else {
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@ -1156,6 +1142,7 @@ static int sh_msiof_get_cs_gpios(struct sh_msiof_spi_priv *p)
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gpiod = devm_gpiod_get_index(dev, "cs", i, GPIOD_ASIS);
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if (!IS_ERR(gpiod)) {
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devm_gpiod_put(dev, gpiod);
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cs_gpios++;
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continue;
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}
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@ -1407,6 +1394,7 @@ static int sh_msiof_spi_probe(struct platform_device *pdev)
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ctlr->bits_per_word_mask = chipdata->bits_per_word_mask;
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ctlr->auto_runtime_pm = true;
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ctlr->transfer_one = sh_msiof_transfer_one;
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ctlr->use_gpio_descriptors = true;
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ret = sh_msiof_request_dma(p);
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if (ret < 0)
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