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arm/arm64: KVM: add opaque private pointer to MMIO data 

For a GICv2 there is always only one (v)CPU involved: the one that
does the access. On a GICv3 the access to a CPU redistributor is
memory-mapped, but not banked, so the (v)CPU affected is determined by
looking at the MMIO address region being accessed.
To allow passing the affected CPU into the accessors later, extend
struct kvm_exit_mmio to add an opaque private pointer parameter.
The current GICv2 emulation just does not use it.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Christoffer Dall <christoffer.dall@linaro.org>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
wifi-calibration
Andre Przywara 2014-11-13 16:21:35 +00:00 committed by Christoffer Dall
parent 1d916229e3
commit 9fedf14677
3 changed files with 3 additions and 0 deletions
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1
arch/arm/include/asm/kvm_mmio.h
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@ -37,6 +37,7 @@ struct kvm_exit_mmio {
u8 data[8];
u32 len;
bool is_write;
void *private;
};
static inline void kvm_prepare_mmio(struct kvm_run *run,

1
arch/arm64/include/asm/kvm_mmio.h
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@ -40,6 +40,7 @@ struct kvm_exit_mmio {
u8 data[8];
u32 len;
bool is_write;
void *private;
};
static inline void kvm_prepare_mmio(struct kvm_run *run,

1
virt/kvm/arm/vgic.c
View File

@ -709,6 +709,7 @@ static bool call_range_handler(struct kvm_vcpu *vcpu,
mmio32.len = 4;
mmio32.is_write = mmio->is_write;
mmio32.private = mmio->private;
mmio32.phys_addr = mmio->phys_addr + 4;
if (mmio->is_write)