KVM: LAPIC: guarantee the timer is in tsc-deadline mode
Check apic_lvtt_tscdeadline() mode directly instead of apic_lvtt_oneshot() and apic_lvtt_period() to guarantee the timer is in tsc-deadline mode when rdmsr MSR_IA32_TSCDEADLINE. Suggested-by: Radim Krčmář <rkrcmar@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: Yunhong Jiang <yunhong.jiang@intel.com> Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com> Signed-off-by: Radim Krčmář <rkrcmar@redhat.com>zero-colors
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@ -1711,8 +1711,8 @@ u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu)
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{
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{
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struct kvm_lapic *apic = vcpu->arch.apic;
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struct kvm_lapic *apic = vcpu->arch.apic;
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if (!lapic_in_kernel(vcpu) || apic_lvtt_oneshot(apic) ||
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if (!lapic_in_kernel(vcpu) ||
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apic_lvtt_period(apic))
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!apic_lvtt_tscdeadline(apic))
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return 0;
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return 0;
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return apic->lapic_timer.tscdeadline;
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return apic->lapic_timer.tscdeadline;
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