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MLK-17481-1: clk: imx8qm: Add DSP clocks 

Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 8bc09ad559237c136f88d93bd696fe10dc4658db)
pull/10/head
Daniel Baluta 2018-07-26 09:23:54 +03:00 committed by Jason Liu
parent 2ec41d7e19
commit a1056eb853
3 changed files with 15 additions and 1 deletions
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6
drivers/clk/imx/clk-imx8qm.c
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@ -682,6 +682,12 @@ static int imx8qm_clk_probe(struct platform_device *pdev)
clks[IMX8QM_ACM_ASRC0_MUX_CLK_CLK] = imx_clk_gate_scu("aud_asrc0_mux_clk", "acm_asrc0_mclk_sel", SC_R_ASRC_0, SC_PM_CLK_PER, NULL, 0, 0);
clks[IMX8QM_ACM_ASRC1_MUX_CLK_CLK] = imx_clk_gate_scu("aud_asrc1_mux_clk", "acm_asrc1_mclk_sel", SC_R_ASRC_1, SC_PM_CLK_PER, NULL, 0, 0);
/* DSP */
clks[IMX8QM_AUD_DSP_ADB_ACLK] = imx_clk_gate2_scu("aud_dsp_adb_aclk", "ipg_aud_clk_root", (void __iomem *)(AUD_DSP_LPCG), 16, FUNCTION_NAME(PD_AUD_DSP));
clks[IMX8QM_AUD_DSP_IPG] = imx_clk_gate2_scu("aud_dsp_ipg", "ipg_aud_clk_root", (void __iomem *)(AUD_DSP_LPCG), 20, FUNCTION_NAME(PD_AUD_DSP));
clks[IMX8QM_AUD_DSP_CORE_CLK] = imx_clk_gate2_scu("aud_dsp_core_clk", "ipg_aud_clk_root", (void __iomem *)(AUD_DSP_LPCG), 28, FUNCTION_NAME(PD_AUD_DSP));
clks[IMX8QM_AUD_OCRAM_IPG] = imx_clk_gate2_scu("aud_ocram_ipg", "ipg_aud_clk_root", (void __iomem *)(AUD_OCRAM_LPCG), 16, FUNCTION_NAME(PD_AUD_OCRAM));
/* MIPI CSI */
clks[IMX8QM_CSI0_I2C0_IPG_CLK] = imx_clk_gate2_scu("mipi_csi0_i2c0_ipg_s", "ipg_mipi_csi_clk_root", LPCG_ADDR(MIPI_CSI_0_LPCG + 0x14), 16, FUNCTION_NAME(PD_MIPI_CSI0_I2C0));
clks[IMX8QM_CSI0_I2C0_CLK] = imx_clk_gate_scu("mipi_csi0_i2c0_clk", "mipi_csi0_i2c0_div", SC_R_CSI_0_I2C_0, SC_PM_CLK_PER, LPCG_ADDR(MIPI_CSI_0_LPCG + 0x14), 0, 0);

8
include/dt-bindings/clock/imx8qm-clock.h
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@ -849,6 +849,12 @@
#define IMX8QM_LSIO_MU6A_IPG_S_CLK 790
#define IMX8QM_LSIO_MU6A_IPG_CLK 791
#define IMX8QM_CLK_END 792
/* DSP */
#define IMX8QM_AUD_DSP_ADB_ACLK 792
#define IMX8QM_AUD_DSP_IPG 793
#define IMX8QM_AUD_DSP_CORE_CLK 794
#define IMX8QM_AUD_OCRAM_IPG 795
#define IMX8QM_CLK_END 796
#endif /* __DT_BINDINGS_CLOCK_IMX8QM_H */

2
include/soc/imx8/imx8qm/lpcg.h
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@ -160,6 +160,8 @@
#define AUD_GPT_8_LPCG 0x594E0000
#define AUD_GPT_9_LPCG 0x594F0000
#define AUD_GPT_10_LPCG 0x59500000
#define AUD_DSP_LPCG 0x59580000
#define AUD_OCRAM_LPCG 0x59590000
#define AUD_EDMA_0_LPCG 0x595f0000
#define AUD_ASRC_1_LPCG 0x59c00000
#define AUD_ESAI_1_LPCG 0x59c10000