ARM: dts: armada388-clearfog: move ethernet related nodes
Move the ethernet, buffer manager, and mdio nodes over to use label form to reference the devices rather than replicating the device path. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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@ -71,27 +71,6 @@
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soc {
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internal-regs {
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ethernet@30000 {
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phy-mode = "sgmii";
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buffer-manager = <&bm>;
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bm,pool-long = <2>;
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bm,pool-short = <1>;
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status = "okay";
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};
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ethernet@34000 {
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phy-mode = "sgmii";
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buffer-manager = <&bm>;
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bm,pool-long = <3>;
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bm,pool-short = <1>;
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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sata@a8000 {
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/* pinctrl? */
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status = "okay";
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@ -147,6 +126,29 @@
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};
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};
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ð1 {
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/* ethernet@30000 */
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bm,pool-long = <2>;
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bm,pool-short = <1>;
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buffer-manager = <&bm>;
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phy-mode = "sgmii";
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status = "okay";
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};
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ð2 {
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/* ethernet@34000 */
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bm,pool-long = <3>;
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bm,pool-short = <1>;
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buffer-manager = <&bm>;
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phy-mode = "sgmii";
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status = "okay";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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&i2c0 {
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/* Is there anything on this? */
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clock-frequency = <100000>;
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@ -62,38 +62,6 @@
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MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
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internal-regs {
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ethernet@70000 {
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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phy = <&phy_dedicated>;
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phy-mode = "rgmii-id";
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buffer-manager = <&bm>;
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bm,pool-long = <0>;
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bm,pool-short = <1>;
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status = "okay";
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};
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mdio@72004 {
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/*
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* Add the phy clock here, so the phy can be
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* accessed to read its IDs prior to binding
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* with the driver.
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*/
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pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>;
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pinctrl-names = "default";
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phy_dedicated: ethernet-phy@0 {
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/*
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* Annoyingly, the marvell phy driver
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* configures the LED register, rather
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* than preserving reset-loaded setting.
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* We undo that rubbish here.
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*/
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marvell,reg-init = <3 16 0 0x101e>;
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reg = <0>;
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};
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};
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rtc@a3800 {
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/*
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* If the rtc doesn't work, run "date reset"
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@ -107,16 +75,46 @@
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pinctrl-names = "default";
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status = "okay";
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};
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bm@c8000 {
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status = "okay";
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};
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};
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};
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};
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bm-bppi {
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status = "okay";
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};
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&bm {
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status = "okay";
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};
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&bm_bppi {
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status = "okay";
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};
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ð0 {
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/* ethernet@70000 */
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pinctrl-0 = <&ge0_rgmii_pins>;
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pinctrl-names = "default";
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phy = <&phy_dedicated>;
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phy-mode = "rgmii-id";
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buffer-manager = <&bm>;
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bm,pool-long = <0>;
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bm,pool-short = <1>;
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status = "okay";
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};
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&mdio {
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/*
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* Add the phy clock here, so the phy can be accessed to read its
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* IDs prior to binding with the driver.
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*/
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pinctrl-0 = <&mdio_pins µsom_phy_clk_pins>;
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pinctrl-names = "default";
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phy_dedicated: ethernet-phy@0 {
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/*
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* Annoyingly, the marvell phy driver configures the LED
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* register, rather than preserving reset-loaded setting.
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* We undo that rubbish here.
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*/
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marvell,reg-init = <3 16 0 0x101e>;
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reg = <0>;
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};
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};
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