of: Add J-Core timer bindings
Signed-off-by: Rich Felker <dalias@libc.org> Acked-by: Rob Herring <robh@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: linux-sh@vger.kernel.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh+dt@kernel.org> Link: http://lkml.kernel.org/r/8b107c292ed8cf8eed0fa283071fc8a930098628.1476393790.git.dalias@libc.org Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
parent
1a1891d762
commit
a2ce092be3
24
Documentation/devicetree/bindings/timer/jcore,pit.txt
Normal file
24
Documentation/devicetree/bindings/timer/jcore,pit.txt
Normal file
|
@ -0,0 +1,24 @@
|
|||
J-Core Programmable Interval Timer and Clocksource
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible: Must be "jcore,pit".
|
||||
|
||||
- reg: Memory region(s) for timer/clocksource registers. For SMP,
|
||||
there should be one region per cpu, indexed by the sequential,
|
||||
zero-based hardware cpu number.
|
||||
|
||||
- interrupts: An interrupt to assign for the timer. The actual pit
|
||||
core is integrated with the aic and allows the timer interrupt
|
||||
assignment to be programmed by software, but this property is
|
||||
required in order to reserve an interrupt number that doesn't
|
||||
conflict with other devices.
|
||||
|
||||
|
||||
Example:
|
||||
|
||||
timer@200 {
|
||||
compatible = "jcore,pit";
|
||||
reg = < 0x200 0x30 0x500 0x30 >;
|
||||
interrupts = < 0x48 >;
|
||||
};
|
Loading…
Reference in a new issue