avr32: convert to dma_map_ops
Signed-off-by: Christoph Hellwig <hch@lst.de> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Christian Borntraeger <borntraeger@de.ibm.com> Cc: Joerg Roedel <jroedel@suse.de> Cc: Sebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>steinar/wifi_calib_4_9_kernel
Christoph Hellwig
Linus Torvalds
parent
052c96dbe3
commit
a34a517ac9
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@ -7,6 +7,7 @@ config AVR32
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select HAVE_OPROFILE
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select HAVE_KPROBES
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select VIRT_TO_BUS
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select HAVE_DMA_ATTRS
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select GENERIC_IRQ_PROBE
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select GENERIC_ATOMIC64
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select HARDIRQS_SW_RESEND
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@ -1,350 +1,16 @@
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#ifndef __ASM_AVR32_DMA_MAPPING_H
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#define __ASM_AVR32_DMA_MAPPING_H
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#include <linux/mm.h>
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#include <linux/device.h>
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#include <linux/scatterlist.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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int direction);
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/*
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* Return whether the given device DMA address mask can be supported
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* properly. For example, if your device can only drive the low 24-bits
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* during bus mastering, then you would pass 0x00ffffff as the mask
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* to this function.
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*/
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static inline int dma_supported(struct device *dev, u64 mask)
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extern struct dma_map_ops avr32_dma_ops;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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/* Fix when needed. I really don't know of any limitations */
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return 1;
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return &avr32_dma_ops;
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}
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static inline int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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if (!dev->dma_mask || !dma_supported(dev, dma_mask))
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return -EIO;
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*dev->dma_mask = dma_mask;
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return 0;
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}
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/*
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* dma_map_single can't fail as it is implemented now.
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*/
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static inline int dma_mapping_error(struct device *dev, dma_addr_t addr)
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{
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return 0;
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}
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/**
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* dma_alloc_coherent - allocate consistent memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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*
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* Allocate some uncached, unbuffered memory for a device for
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* performing DMA. This function allocates pages, and will
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* return the CPU-viewed address, and sets @handle to be the
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* device-viewed address.
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*/
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extern void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp);
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/**
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* dma_free_coherent - free memory allocated by dma_alloc_coherent
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: size of memory originally requested in dma_alloc_coherent
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* @cpu_addr: CPU-view address returned from dma_alloc_coherent
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* @handle: device-view address returned from dma_alloc_coherent
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*
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* Free (and unmap) a DMA buffer previously allocated by
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* dma_alloc_coherent().
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*
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* References to memory and mappings associated with cpu_addr/handle
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* during and after this call executing are illegal.
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*/
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extern void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t handle);
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/**
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* dma_alloc_writecombine - allocate write-combining memory for DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: required memory size
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* @handle: bus-specific DMA address
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*
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* Allocate some uncached, buffered memory for a device for
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* performing DMA. This function allocates pages, and will
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* return the CPU-viewed address, and sets @handle to be the
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* device-viewed address.
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*/
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extern void *dma_alloc_writecombine(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp);
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/**
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* dma_free_coherent - free memory allocated by dma_alloc_writecombine
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @size: size of memory originally requested in dma_alloc_writecombine
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* @cpu_addr: CPU-view address returned from dma_alloc_writecombine
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* @handle: device-view address returned from dma_alloc_writecombine
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*
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* Free (and unmap) a DMA buffer previously allocated by
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* dma_alloc_writecombine().
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*
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* References to memory and mappings associated with cpu_addr/handle
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* during and after this call executing are illegal.
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*/
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extern void dma_free_writecombine(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t handle);
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/**
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* dma_map_single - map a single buffer for streaming DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @cpu_addr: CPU direct mapped address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Ensure that any data held in the cache is appropriately discarded
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* or written back.
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*
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* The device owns this memory once this call has completed. The CPU
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* can regain ownership by calling dma_unmap_single() or dma_sync_single().
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*/
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static inline dma_addr_t
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dma_map_single(struct device *dev, void *cpu_addr, size_t size,
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enum dma_data_direction direction)
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{
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dma_cache_sync(dev, cpu_addr, size, direction);
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return virt_to_bus(cpu_addr);
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}
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/**
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* dma_unmap_single - unmap a single buffer previously mapped
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @handle: DMA address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Unmap a single streaming mode DMA translation. The handle and size
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* must match what was provided in the previous dma_map_single() call.
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* All other usages are undefined.
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*
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* After this call, reads by the CPU to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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static inline void
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dma_unmap_single(struct device *dev, dma_addr_t dma_addr, size_t size,
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enum dma_data_direction direction)
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{
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}
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/**
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* dma_map_page - map a portion of a page for streaming DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @page: page that buffer resides in
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* @offset: offset into page for start of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Ensure that any data held in the cache is appropriately discarded
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* or written back.
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*
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* The device owns this memory once this call has completed. The CPU
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* can regain ownership by calling dma_unmap_page() or dma_sync_single().
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*/
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static inline dma_addr_t
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dma_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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return dma_map_single(dev, page_address(page) + offset,
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size, direction);
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}
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/**
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* dma_unmap_page - unmap a buffer previously mapped through dma_map_page()
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @handle: DMA address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Unmap a single streaming mode DMA translation. The handle and size
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* must match what was provided in the previous dma_map_single() call.
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* All other usages are undefined.
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*
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* After this call, reads by the CPU to the buffer are guaranteed to see
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* whatever the device wrote there.
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*/
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static inline void
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dma_unmap_page(struct device *dev, dma_addr_t dma_address, size_t size,
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enum dma_data_direction direction)
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{
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dma_unmap_single(dev, dma_address, size, direction);
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}
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/**
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* dma_map_sg - map a set of SG buffers for streaming mode DMA
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Map a set of buffers described by scatterlist in streaming
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* mode for DMA. This is the scatter-gather version of the
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* above pci_map_single interface. Here the scatter gather list
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* elements are each tagged with the appropriate dma address
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* and length. They are obtained via sg_dma_{address,length}(SG).
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*
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* NOTE: An implementation may be able to use a smaller number of
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* DMA address/length pairs than there are SG table elements.
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* (for example via virtual mapping capabilities)
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* The routine returns the number of addr/length pairs actually
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* used, at most nents.
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*
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* Device ownership issues as mentioned above for pci_map_single are
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* the same here.
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*/
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static inline int
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dma_map_sg(struct device *dev, struct scatterlist *sglist, int nents,
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enum dma_data_direction direction)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nents, i) {
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char *virt;
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sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
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virt = sg_virt(sg);
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dma_cache_sync(dev, virt, sg->length, direction);
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}
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return nents;
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}
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/**
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* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Unmap a set of streaming mode DMA translations.
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* Again, CPU read rules concerning calls here are the same as for
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* pci_unmap_single() above.
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*/
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static inline void
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dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nhwentries,
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enum dma_data_direction direction)
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{
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}
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/**
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* dma_sync_single_for_cpu
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @handle: DMA address of buffer
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* @size: size of buffer to map
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* @dir: DMA transfer direction
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*
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* Make physical memory consistent for a single streaming mode DMA
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* translation after a transfer.
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*
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* If you perform a dma_map_single() but wish to interrogate the
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* buffer using the cpu, yet do not wish to teardown the DMA mapping,
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* you must call this function before doing so. At the next point you
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* give the DMA address back to the card, you must first perform a
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* dma_sync_single_for_device, and then the device again owns the
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* buffer.
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*/
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static inline void
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dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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/*
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* No need to do anything since the CPU isn't supposed to
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* touch this memory after we flushed it at mapping- or
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* sync-for-device time.
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*/
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}
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static inline void
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dma_sync_single_for_device(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction direction)
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{
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dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
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}
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static inline void
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dma_sync_single_range_for_cpu(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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/* just sync everything, that's all the pci API can do */
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dma_sync_single_for_cpu(dev, dma_handle, offset+size, direction);
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}
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static inline void
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dma_sync_single_range_for_device(struct device *dev, dma_addr_t dma_handle,
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unsigned long offset, size_t size,
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enum dma_data_direction direction)
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{
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/* just sync everything, that's all the pci API can do */
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dma_sync_single_for_device(dev, dma_handle, offset+size, direction);
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}
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/**
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* dma_sync_sg_for_cpu
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @sg: list of buffers
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* @nents: number of buffers to map
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* @dir: DMA transfer direction
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*
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* Make physical memory consistent for a set of streaming
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* mode DMA translations after a transfer.
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*
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* The same as dma_sync_single_for_* but for a scatter-gather list,
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* same rules and usage.
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*/
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction direction)
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{
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/*
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* No need to do anything since the CPU isn't supposed to
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* touch this memory after we flushed it at mapping- or
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* sync-for-device time.
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*/
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sglist,
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int nents, enum dma_data_direction direction)
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{
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int i;
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struct scatterlist *sg;
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for_each_sg(sglist, sg, nents, i)
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dma_cache_sync(dev, sg_virt(sg), sg->length, direction);
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}
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/* Now for the API extensions over the pci_ one */
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#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
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#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
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/* drivers/base/dma-mapping.c */
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extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size);
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extern int dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t dma_addr,
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size_t size);
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#define dma_mmap_coherent(d, v, c, h, s) dma_common_mmap(d, v, c, h, s)
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#define dma_get_sgtable(d, t, v, h, s) dma_common_get_sgtable(d, t, v, h, s)
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#include <asm-generic/dma-mapping-common.h>
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#endif /* __ASM_AVR32_DMA_MAPPING_H */
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@ -9,9 +9,14 @@
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/export.h>
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#include <linux/mm.h>
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#include <linux/device.h>
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#include <linux/scatterlist.h>
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#include <asm/addrspace.h>
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#include <asm/processor.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/addrspace.h>
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size, int direction)
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{
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@ -93,36 +98,8 @@ static void __dma_free(struct device *dev, size_t size,
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__free_page(page++);
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}
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void *dma_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp)
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{
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struct page *page;
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void *ret = NULL;
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page = __dma_alloc(dev, size, handle, gfp);
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if (page)
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ret = phys_to_uncached(page_to_phys(page));
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return ret;
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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void dma_free_coherent(struct device *dev, size_t size,
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void *cpu_addr, dma_addr_t handle)
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{
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void *addr = phys_to_cached(uncached_to_phys(cpu_addr));
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struct page *page;
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pr_debug("dma_free_coherent addr %p (phys %08lx) size %u\n",
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cpu_addr, (unsigned long)handle, (unsigned)size);
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BUG_ON(!virt_addr_valid(addr));
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page = virt_to_page(addr);
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__dma_free(dev, size, page, handle);
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}
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EXPORT_SYMBOL(dma_free_coherent);
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void *dma_alloc_writecombine(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp)
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static void *avr32_dma_alloc(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp, struct dma_attrs *attrs)
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{
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struct page *page;
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dma_addr_t phys;
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@ -130,23 +107,91 @@ void *dma_alloc_writecombine(struct device *dev, size_t size,
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page = __dma_alloc(dev, size, handle, gfp);
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if (!page)
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return NULL;
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phys = page_to_phys(page);
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*handle = phys;
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/* Now, map the page into P3 with write-combining turned on */
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return __ioremap(phys, size, _PAGE_BUFFER);
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if (dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs)) {
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/* Now, map the page into P3 with write-combining turned on */
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*handle = phys;
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return __ioremap(phys, size, _PAGE_BUFFER);
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} else {
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return phys_to_uncached(phys);
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}
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}
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||||
EXPORT_SYMBOL(dma_alloc_writecombine);
|
||||
|
||||
void dma_free_writecombine(struct device *dev, size_t size,
|
||||
void *cpu_addr, dma_addr_t handle)
|
||||
static void avr32_dma_free(struct device *dev, size_t size,
|
||||
void *cpu_addr, dma_addr_t handle, struct dma_attrs *attrs)
|
||||
{
|
||||
struct page *page;
|
||||
|
||||
iounmap(cpu_addr);
|
||||
if (dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs)) {
|
||||
iounmap(cpu_addr);
|
||||
|
||||
page = phys_to_page(handle);
|
||||
} else {
|
||||
void *addr = phys_to_cached(uncached_to_phys(cpu_addr));
|
||||
|
||||
pr_debug("avr32_dma_free addr %p (phys %08lx) size %u\n",
|
||||
cpu_addr, (unsigned long)handle, (unsigned)size);
|
||||
|
||||
BUG_ON(!virt_addr_valid(addr));
|
||||
page = virt_to_page(addr);
|
||||
}
|
||||
|
||||
page = phys_to_page(handle);
|
||||
__dma_free(dev, size, page, handle);
|
||||
}
|
||||
EXPORT_SYMBOL(dma_free_writecombine);
|
||||
|
||||
static dma_addr_t avr32_dma_map_page(struct device *dev, struct page *page,
|
||||
unsigned long offset, size_t size,
|
||||
enum dma_data_direction direction, struct dma_attrs *attrs)
|
||||
{
|
||||
void *cpu_addr = page_address(page) + offset;
|
||||
|
||||
dma_cache_sync(dev, cpu_addr, size, direction);
|
||||
return virt_to_bus(cpu_addr);
|
||||
}
|
||||
|
||||
static int avr32_dma_map_sg(struct device *dev, struct scatterlist *sglist,
|
||||
int nents, enum dma_data_direction direction,
|
||||
struct dma_attrs *attrs)
|
||||
{
|
||||
int i;
|
||||
struct scatterlist *sg;
|
||||
|
||||
for_each_sg(sglist, sg, nents, i) {
|
||||
char *virt;
|
||||
|
||||
sg->dma_address = page_to_bus(sg_page(sg)) + sg->offset;
|
||||
virt = sg_virt(sg);
|
||||
dma_cache_sync(dev, virt, sg->length, direction);
|
||||
}
|
||||
|
||||
return nents;
|
||||
}
|
||||
|
||||
static void avr32_dma_sync_single_for_device(struct device *dev,
|
||||
dma_addr_t dma_handle, size_t size,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction);
|
||||
}
|
||||
|
||||
static void avr32_dma_sync_sg_for_device(struct device *dev,
|
||||
struct scatterlist *sglist, int nents,
|
||||
enum dma_data_direction direction)
|
||||
{
|
||||
int i;
|
||||
struct scatterlist *sg;
|
||||
|
||||
for_each_sg(sglist, sg, nents, i)
|
||||
dma_cache_sync(dev, sg_virt(sg), sg->length, direction);
|
||||
}
|
||||
|
||||
struct dma_map_ops avr32_dma_ops = {
|
||||
.alloc = avr32_dma_alloc,
|
||||
.free = avr32_dma_free,
|
||||
.map_page = avr32_dma_map_page,
|
||||
.map_sg = avr32_dma_map_sg,
|
||||
.sync_single_for_device = avr32_dma_sync_single_for_device,
|
||||
.sync_sg_for_device = avr32_dma_sync_sg_for_device,
|
||||
};
|
||||
EXPORT_SYMBOL(avr32_dma_ops);
|
||||
|
|
|
|||
Loading…
Reference in New Issue