[SPARC64]: Move kernel unaligned trap handlers into assembler file.
GCC 4.x really dislikes the games we are playing in unaligned.c, and the cleanest way to fix this is to move things into assembler. Noted by Al Viro. Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
8d5290149e
commit
a3f9985843
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@ -8,7 +8,7 @@ EXTRA_CFLAGS := -Werror
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extra-y := head.o init_task.o vmlinux.lds
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obj-y := process.o setup.o cpu.o idprom.o \
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traps.o devices.o auxio.o \
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traps.o devices.o auxio.o una_asm.o \
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irq.o ptrace.o time.o sys_sparc.o signal.o \
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unaligned.o central.o pci.o starfire.o semaphore.o \
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power.o sbus.o iommu_common.o sparc64_ksyms.o chmc.o
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@ -2127,6 +2127,9 @@ void __init trap_init(void)
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TI_PRE_COUNT != offsetof(struct thread_info, preempt_count) ||
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TI_NEW_CHILD != offsetof(struct thread_info, new_child) ||
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TI_SYS_NOERROR != offsetof(struct thread_info, syscall_noerror) ||
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TI_RESTART_BLOCK != offsetof(struct thread_info, restart_block) ||
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TI_KUNA_REGS != offsetof(struct thread_info, kern_una_regs) ||
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TI_KUNA_INSN != offsetof(struct thread_info, kern_una_insn) ||
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TI_FPREGS != offsetof(struct thread_info, fpregs) ||
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(TI_FPREGS & (64 - 1)))
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thread_info_offsets_are_bolixed_dave();
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153
arch/sparc64/kernel/una_asm.S
Normal file
153
arch/sparc64/kernel/una_asm.S
Normal file
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@ -0,0 +1,153 @@
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/* una_asm.S: Kernel unaligned trap assembler helpers.
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*
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* Copyright (C) 1996,2005 David S. Miller (davem@davemloft.net)
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* Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
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*/
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.text
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kernel_unaligned_trap_fault:
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call kernel_mna_trap_fault
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nop
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retl
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nop
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.size kern_unaligned_trap_fault, .-kern_unaligned_trap_fault
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.globl __do_int_store
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__do_int_store:
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rd %asi, %o4
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wr %o3, 0, %asi
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ldx [%o2], %g3
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cmp %o1, 2
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be,pn %icc, 2f
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cmp %o1, 4
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be,pt %icc, 1f
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srlx %g3, 24, %g2
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srlx %g3, 56, %g1
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srlx %g3, 48, %g7
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4: stba %g1, [%o0] %asi
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srlx %g3, 40, %g1
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5: stba %g7, [%o0 + 1] %asi
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srlx %g3, 32, %g7
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6: stba %g1, [%o0 + 2] %asi
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7: stba %g7, [%o0 + 3] %asi
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srlx %g3, 16, %g1
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8: stba %g2, [%o0 + 4] %asi
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srlx %g3, 8, %g7
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9: stba %g1, [%o0 + 5] %asi
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10: stba %g7, [%o0 + 6] %asi
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ba,pt %xcc, 0f
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11: stba %g3, [%o0 + 7] %asi
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1: srl %g3, 16, %g7
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12: stba %g2, [%o0] %asi
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srl %g3, 8, %g2
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13: stba %g7, [%o0 + 1] %asi
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14: stba %g2, [%o0 + 2] %asi
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ba,pt %xcc, 0f
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15: stba %g3, [%o0 + 3] %asi
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2: srl %g3, 8, %g2
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16: stba %g2, [%o0] %asi
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17: stba %g3, [%o0 + 1] %asi
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0:
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wr %o4, 0x0, %asi
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retl
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nop
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.size __do_int_store, .-__do_int_store
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.section __ex_table
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.word 4b, kernel_unaligned_trap_fault
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.word 5b, kernel_unaligned_trap_fault
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.word 6b, kernel_unaligned_trap_fault
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.word 7b, kernel_unaligned_trap_fault
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.word 8b, kernel_unaligned_trap_fault
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.word 9b, kernel_unaligned_trap_fault
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.word 10b, kernel_unaligned_trap_fault
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.word 11b, kernel_unaligned_trap_fault
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.word 12b, kernel_unaligned_trap_fault
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.word 13b, kernel_unaligned_trap_fault
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.word 14b, kernel_unaligned_trap_fault
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.word 15b, kernel_unaligned_trap_fault
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.word 16b, kernel_unaligned_trap_fault
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.word 17b, kernel_unaligned_trap_fault
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.previous
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.globl do_int_load
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do_int_load:
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rd %asi, %o5
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wr %o4, 0, %asi
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cmp %o1, 8
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bge,pn %icc, 9f
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cmp %o1, 4
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be,pt %icc, 6f
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4: lduba [%o2] %asi, %g2
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5: lduba [%o2 + 1] %asi, %g3
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sll %g2, 8, %g2
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brz,pt %o3, 3f
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add %g2, %g3, %g2
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sllx %g2, 48, %g2
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srax %g2, 48, %g2
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3: ba,pt %xcc, 0f
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stx %g2, [%o0]
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6: lduba [%o2 + 1] %asi, %g3
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sll %g2, 24, %g2
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7: lduba [%o2 + 2] %asi, %g7
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sll %g3, 16, %g3
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8: lduba [%o2 + 3] %asi, %g1
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sll %g7, 8, %g7
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or %g2, %g3, %g2
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or %g7, %g1, %g7
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or %g2, %g7, %g2
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brnz,a,pt %o3, 3f
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sra %g2, 0, %g2
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3: ba,pt %xcc, 0f
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stx %g2, [%o0]
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9: lduba [%o2] %asi, %g2
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10: lduba [%o2 + 1] %asi, %g3
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sllx %g2, 56, %g2
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11: lduba [%o2 + 2] %asi, %g7
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sllx %g3, 48, %g3
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12: lduba [%o2 + 3] %asi, %g1
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sllx %g7, 40, %g7
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sllx %g1, 32, %g1
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or %g2, %g3, %g2
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or %g7, %g1, %g7
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13: lduba [%o2 + 4] %asi, %g3
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or %g2, %g7, %g7
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14: lduba [%o2 + 5] %asi, %g1
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sllx %g3, 24, %g3
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15: lduba [%o2 + 6] %asi, %g2
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sllx %g1, 16, %g1
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or %g7, %g3, %g7
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16: lduba [%o2 + 7] %asi, %g3
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sllx %g2, 8, %g2
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or %g7, %g1, %g7
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or %g2, %g3, %g2
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or %g7, %g2, %g7
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cmp %o1, 8
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be,a,pt %icc, 0f
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stx %g7, [%o0]
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srlx %g7, 32, %g2
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sra %g7, 0, %g7
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stx %g2, [%o0]
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stx %g7, [%o0 + 8]
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0:
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wr %o5, 0x0, %asi
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retl
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nop
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.size __do_int_load, .-__do_int_load
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.section __ex_table
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.word 4b, kernel_unaligned_trap_fault
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.word 5b, kernel_unaligned_trap_fault
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.word 6b, kernel_unaligned_trap_fault
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.word 7b, kernel_unaligned_trap_fault
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.word 8b, kernel_unaligned_trap_fault
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.word 9b, kernel_unaligned_trap_fault
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.word 10b, kernel_unaligned_trap_fault
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.word 11b, kernel_unaligned_trap_fault
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.word 12b, kernel_unaligned_trap_fault
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.word 13b, kernel_unaligned_trap_fault
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.word 14b, kernel_unaligned_trap_fault
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.word 15b, kernel_unaligned_trap_fault
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.word 16b, kernel_unaligned_trap_fault
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.previous
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@ -180,169 +180,28 @@ static void __attribute_used__ unaligned_panic(char *str, struct pt_regs *regs)
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die_if_kernel(str, regs);
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}
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#define do_integer_load(dest_reg, size, saddr, is_signed, asi, errh) ({ \
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__asm__ __volatile__ ( \
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"wr %4, 0, %%asi\n\t" \
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"cmp %1, 8\n\t" \
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"bge,pn %%icc, 9f\n\t" \
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" cmp %1, 4\n\t" \
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"be,pt %%icc, 6f\n" \
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"4:\t" " lduba [%2] %%asi, %%l1\n" \
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"5:\t" "lduba [%2 + 1] %%asi, %%l2\n\t" \
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"sll %%l1, 8, %%l1\n\t" \
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"brz,pt %3, 3f\n\t" \
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" add %%l1, %%l2, %%l1\n\t" \
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"sllx %%l1, 48, %%l1\n\t" \
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"srax %%l1, 48, %%l1\n" \
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"3:\t" "ba,pt %%xcc, 0f\n\t" \
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" stx %%l1, [%0]\n" \
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"6:\t" "lduba [%2 + 1] %%asi, %%l2\n\t" \
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"sll %%l1, 24, %%l1\n" \
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"7:\t" "lduba [%2 + 2] %%asi, %%g7\n\t" \
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"sll %%l2, 16, %%l2\n" \
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"8:\t" "lduba [%2 + 3] %%asi, %%g1\n\t" \
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"sll %%g7, 8, %%g7\n\t" \
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"or %%l1, %%l2, %%l1\n\t" \
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"or %%g7, %%g1, %%g7\n\t" \
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"or %%l1, %%g7, %%l1\n\t" \
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"brnz,a,pt %3, 3f\n\t" \
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" sra %%l1, 0, %%l1\n" \
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"3:\t" "ba,pt %%xcc, 0f\n\t" \
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" stx %%l1, [%0]\n" \
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"9:\t" "lduba [%2] %%asi, %%l1\n" \
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"10:\t" "lduba [%2 + 1] %%asi, %%l2\n\t" \
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"sllx %%l1, 56, %%l1\n" \
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"11:\t" "lduba [%2 + 2] %%asi, %%g7\n\t" \
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"sllx %%l2, 48, %%l2\n" \
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"12:\t" "lduba [%2 + 3] %%asi, %%g1\n\t" \
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"sllx %%g7, 40, %%g7\n\t" \
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"sllx %%g1, 32, %%g1\n\t" \
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"or %%l1, %%l2, %%l1\n\t" \
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"or %%g7, %%g1, %%g7\n" \
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"13:\t" "lduba [%2 + 4] %%asi, %%l2\n\t" \
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"or %%l1, %%g7, %%g7\n" \
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"14:\t" "lduba [%2 + 5] %%asi, %%g1\n\t" \
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"sllx %%l2, 24, %%l2\n" \
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"15:\t" "lduba [%2 + 6] %%asi, %%l1\n\t" \
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"sllx %%g1, 16, %%g1\n\t" \
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"or %%g7, %%l2, %%g7\n" \
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"16:\t" "lduba [%2 + 7] %%asi, %%l2\n\t" \
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"sllx %%l1, 8, %%l1\n\t" \
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"or %%g7, %%g1, %%g7\n\t" \
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"or %%l1, %%l2, %%l1\n\t" \
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"or %%g7, %%l1, %%g7\n\t" \
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"cmp %1, 8\n\t" \
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"be,a,pt %%icc, 0f\n\t" \
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" stx %%g7, [%0]\n\t" \
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"srlx %%g7, 32, %%l1\n\t" \
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"sra %%g7, 0, %%g7\n\t" \
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"stx %%l1, [%0]\n\t" \
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"stx %%g7, [%0 + 8]\n" \
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"0:\n\t" \
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"wr %%g0, %5, %%asi\n\n\t" \
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".section __ex_table\n\t" \
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".word 4b, " #errh "\n\t" \
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".word 5b, " #errh "\n\t" \
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".word 6b, " #errh "\n\t" \
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".word 7b, " #errh "\n\t" \
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".word 8b, " #errh "\n\t" \
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".word 9b, " #errh "\n\t" \
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".word 10b, " #errh "\n\t" \
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".word 11b, " #errh "\n\t" \
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".word 12b, " #errh "\n\t" \
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".word 13b, " #errh "\n\t" \
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".word 14b, " #errh "\n\t" \
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".word 15b, " #errh "\n\t" \
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".word 16b, " #errh "\n\n\t" \
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".previous\n\t" \
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: : "r" (dest_reg), "r" (size), "r" (saddr), "r" (is_signed), \
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"r" (asi), "i" (ASI_AIUS) \
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: "l1", "l2", "g7", "g1", "cc"); \
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})
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extern void do_int_load(unsigned long *dest_reg, int size,
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unsigned long *saddr, int is_signed, int asi);
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#define store_common(dst_addr, size, src_val, asi, errh) ({ \
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__asm__ __volatile__ ( \
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"wr %3, 0, %%asi\n\t" \
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"ldx [%2], %%l1\n" \
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"cmp %1, 2\n\t" \
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"be,pn %%icc, 2f\n\t" \
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" cmp %1, 4\n\t" \
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"be,pt %%icc, 1f\n\t" \
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" srlx %%l1, 24, %%l2\n\t" \
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"srlx %%l1, 56, %%g1\n\t" \
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"srlx %%l1, 48, %%g7\n" \
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"4:\t" "stba %%g1, [%0] %%asi\n\t" \
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"srlx %%l1, 40, %%g1\n" \
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"5:\t" "stba %%g7, [%0 + 1] %%asi\n\t" \
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"srlx %%l1, 32, %%g7\n" \
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"6:\t" "stba %%g1, [%0 + 2] %%asi\n" \
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"7:\t" "stba %%g7, [%0 + 3] %%asi\n\t" \
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"srlx %%l1, 16, %%g1\n" \
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"8:\t" "stba %%l2, [%0 + 4] %%asi\n\t" \
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"srlx %%l1, 8, %%g7\n" \
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"9:\t" "stba %%g1, [%0 + 5] %%asi\n" \
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"10:\t" "stba %%g7, [%0 + 6] %%asi\n\t" \
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"ba,pt %%xcc, 0f\n" \
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"11:\t" " stba %%l1, [%0 + 7] %%asi\n" \
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"1:\t" "srl %%l1, 16, %%g7\n" \
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"12:\t" "stba %%l2, [%0] %%asi\n\t" \
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"srl %%l1, 8, %%l2\n" \
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"13:\t" "stba %%g7, [%0 + 1] %%asi\n" \
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"14:\t" "stba %%l2, [%0 + 2] %%asi\n\t" \
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"ba,pt %%xcc, 0f\n" \
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"15:\t" " stba %%l1, [%0 + 3] %%asi\n" \
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"2:\t" "srl %%l1, 8, %%l2\n" \
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"16:\t" "stba %%l2, [%0] %%asi\n" \
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"17:\t" "stba %%l1, [%0 + 1] %%asi\n" \
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"0:\n\t" \
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"wr %%g0, %4, %%asi\n\n\t" \
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".section __ex_table\n\t" \
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".word 4b, " #errh "\n\t" \
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".word 5b, " #errh "\n\t" \
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".word 6b, " #errh "\n\t" \
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".word 7b, " #errh "\n\t" \
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".word 8b, " #errh "\n\t" \
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".word 9b, " #errh "\n\t" \
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".word 10b, " #errh "\n\t" \
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".word 11b, " #errh "\n\t" \
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".word 12b, " #errh "\n\t" \
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".word 13b, " #errh "\n\t" \
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".word 14b, " #errh "\n\t" \
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".word 15b, " #errh "\n\t" \
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".word 16b, " #errh "\n\t" \
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".word 17b, " #errh "\n\n\t" \
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".previous\n\t" \
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: : "r" (dst_addr), "r" (size), "r" (src_val), "r" (asi), "i" (ASI_AIUS)\
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: "l1", "l2", "g7", "g1", "cc"); \
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})
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extern void __do_int_store(unsigned long *dst_addr, int size,
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unsigned long *src_val, int asi);
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#define do_integer_store(reg_num, size, dst_addr, regs, asi, errh) ({ \
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unsigned long zero = 0; \
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unsigned long *src_val = &zero; \
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\
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if (size == 16) { \
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size = 8; \
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zero = (((long)(reg_num ? \
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(unsigned)fetch_reg(reg_num, regs) : 0)) << 32) | \
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(unsigned)fetch_reg(reg_num + 1, regs); \
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} else if (reg_num) src_val = fetch_reg_addr(reg_num, regs); \
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store_common(dst_addr, size, src_val, asi, errh); \
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})
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static inline void do_int_store(int reg_num, int size, unsigned long *dst_addr,
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struct pt_regs *regs, int asi)
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{
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unsigned long zero = 0;
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unsigned long *src_val = &zero;
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extern void smp_capture(void);
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extern void smp_release(void);
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#define do_atomic(srcdest_reg, mem, errh) ({ \
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unsigned long flags, tmp; \
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\
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smp_capture(); \
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local_irq_save(flags); \
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tmp = *srcdest_reg; \
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do_integer_load(srcdest_reg, 4, mem, 0, errh); \
|
||||
store_common(mem, 4, &tmp, errh); \
|
||||
local_irq_restore(flags); \
|
||||
smp_release(); \
|
||||
})
|
||||
if (size == 16) {
|
||||
size = 8;
|
||||
zero = (((long)(reg_num ?
|
||||
(unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
|
||||
(unsigned)fetch_reg(reg_num + 1, regs);
|
||||
} else if (reg_num) {
|
||||
src_val = fetch_reg_addr(reg_num, regs);
|
||||
}
|
||||
__do_int_store(dst_addr, size, src_val, asi);
|
||||
}
|
||||
|
||||
static inline void advance(struct pt_regs *regs)
|
||||
{
|
||||
|
@ -364,24 +223,29 @@ static inline int ok_for_kernel(unsigned int insn)
|
|||
return !floating_point_load_or_store_p(insn);
|
||||
}
|
||||
|
||||
void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn) __asm__ ("kernel_mna_trap_fault");
|
||||
|
||||
void kernel_mna_trap_fault(struct pt_regs *regs, unsigned int insn)
|
||||
void kernel_mna_trap_fault(void)
|
||||
{
|
||||
struct pt_regs *regs = current_thread_info()->kern_una_regs;
|
||||
unsigned int insn = current_thread_info()->kern_una_insn;
|
||||
unsigned long g2 = regs->u_regs[UREG_G2];
|
||||
unsigned long fixup = search_extables_range(regs->tpc, &g2);
|
||||
|
||||
if (!fixup) {
|
||||
unsigned long address = compute_effective_address(regs, insn, ((insn >> 25) & 0x1f));
|
||||
unsigned long address;
|
||||
|
||||
address = compute_effective_address(regs, insn,
|
||||
((insn >> 25) & 0x1f));
|
||||
if (address < PAGE_SIZE) {
|
||||
printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference in mna handler");
|
||||
printk(KERN_ALERT "Unable to handle kernel NULL "
|
||||
"pointer dereference in mna handler");
|
||||
} else
|
||||
printk(KERN_ALERT "Unable to handle kernel paging request in mna handler");
|
||||
printk(KERN_ALERT "Unable to handle kernel paging "
|
||||
"request in mna handler");
|
||||
printk(KERN_ALERT " at virtual address %016lx\n",address);
|
||||
printk(KERN_ALERT "current->{mm,active_mm}->context = %016lx\n",
|
||||
printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
|
||||
(current->mm ? CTX_HWBITS(current->mm->context) :
|
||||
CTX_HWBITS(current->active_mm->context)));
|
||||
printk(KERN_ALERT "current->{mm,active_mm}->pgd = %016lx\n",
|
||||
printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
|
||||
(current->mm ? (unsigned long) current->mm->pgd :
|
||||
(unsigned long) current->active_mm->pgd));
|
||||
die_if_kernel("Oops", regs);
|
||||
|
@ -400,48 +264,41 @@ asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn, u
|
|||
enum direction dir = decode_direction(insn);
|
||||
int size = decode_access_size(insn);
|
||||
|
||||
current_thread_info()->kern_una_regs = regs;
|
||||
current_thread_info()->kern_una_insn = insn;
|
||||
|
||||
if (!ok_for_kernel(insn) || dir == both) {
|
||||
printk("Unsupported unaligned load/store trap for kernel at <%016lx>.\n",
|
||||
regs->tpc);
|
||||
unaligned_panic("Kernel does fpu/atomic unaligned load/store.", regs);
|
||||
printk("Unsupported unaligned load/store trap for kernel "
|
||||
"at <%016lx>.\n", regs->tpc);
|
||||
unaligned_panic("Kernel does fpu/atomic "
|
||||
"unaligned load/store.", regs);
|
||||
|
||||
__asm__ __volatile__ ("\n"
|
||||
"kernel_unaligned_trap_fault:\n\t"
|
||||
"mov %0, %%o0\n\t"
|
||||
"call kernel_mna_trap_fault\n\t"
|
||||
" mov %1, %%o1\n\t"
|
||||
:
|
||||
: "r" (regs), "r" (insn)
|
||||
: "o0", "o1", "o2", "o3", "o4", "o5", "o7",
|
||||
"g1", "g2", "g3", "g4", "g7", "cc");
|
||||
kernel_mna_trap_fault();
|
||||
} else {
|
||||
unsigned long addr = compute_effective_address(regs, insn, ((insn >> 25) & 0x1f));
|
||||
unsigned long addr;
|
||||
|
||||
addr = compute_effective_address(regs, insn,
|
||||
((insn >> 25) & 0x1f));
|
||||
#ifdef DEBUG_MNA
|
||||
printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] retpc[%016lx]\n",
|
||||
regs->tpc, dirstrings[dir], addr, size, regs->u_regs[UREG_RETPC]);
|
||||
printk("KMNA: pc=%016lx [dir=%s addr=%016lx size=%d] "
|
||||
"retpc[%016lx]\n",
|
||||
regs->tpc, dirstrings[dir], addr, size,
|
||||
regs->u_regs[UREG_RETPC]);
|
||||
#endif
|
||||
switch (dir) {
|
||||
case load:
|
||||
do_integer_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
do_int_load(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
size, (unsigned long *) addr,
|
||||
decode_signedness(insn), decode_asi(insn, regs),
|
||||
kernel_unaligned_trap_fault);
|
||||
decode_signedness(insn),
|
||||
decode_asi(insn, regs));
|
||||
break;
|
||||
|
||||
case store:
|
||||
do_integer_store(((insn>>25)&0x1f), size,
|
||||
do_int_store(((insn>>25)&0x1f), size,
|
||||
(unsigned long *) addr, regs,
|
||||
decode_asi(insn, regs),
|
||||
kernel_unaligned_trap_fault);
|
||||
decode_asi(insn, regs));
|
||||
break;
|
||||
#if 0 /* unsupported */
|
||||
case both:
|
||||
do_atomic(fetch_reg_addr(((insn>>25)&0x1f), regs),
|
||||
(unsigned long *) addr,
|
||||
kernel_unaligned_trap_fault);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
panic("Impossible kernel unaligned trap.");
|
||||
/* Not reached... */
|
||||
|
|
|
@ -68,6 +68,9 @@ struct thread_info {
|
|||
|
||||
struct restart_block restart_block;
|
||||
|
||||
struct pt_regs *kern_una_regs;
|
||||
unsigned int kern_una_insn;
|
||||
|
||||
unsigned long fpregs[0] __attribute__ ((aligned(64)));
|
||||
};
|
||||
|
||||
|
@ -103,6 +106,8 @@ struct thread_info {
|
|||
#define TI_PCR 0x00000490
|
||||
#define TI_CEE_STUFF 0x00000498
|
||||
#define TI_RESTART_BLOCK 0x000004a0
|
||||
#define TI_KUNA_REGS 0x000004c8
|
||||
#define TI_KUNA_INSN 0x000004d0
|
||||
#define TI_FPREGS 0x00000500
|
||||
|
||||
/* We embed this in the uppermost byte of thread_info->flags */
|
||||
|
|
Loading…
Reference in a new issue