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Blackfin: bf518f-ezbrd: fix SPI CS for SPI flash

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The SPI flash on the BF518F-EZBRD board is actually hooked up to CS2,
not CS1, so make sure the resources are correct.

URL: http://blackfin.uclinux.org/gf/tracker/5220
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Graf Yang 2009-06-10 08:45:12 +00:00 committed by Mike Frysinger
parent 53122693c3
commit a427293f84
1 changed files with 1 additions and 1 deletions
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arch/blackfin/mach-bf518/boards/ezbrd.c
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@ -246,7 +246,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = {
.modalias = "m25p80", /* Name of spi_driver for this device */
.max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
.bus_num = 0, /* Framework bus number */
.chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
.chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */
.platform_data = &bfin_spi_flash_data,
.controller_data = &spi_flash_chip_info,
.mode = SPI_MODE_3,