Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Thomas Gleixner: "Two fixlets for the armada SoC interrupt controller" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip: armada-370-xp: Fix MPIC interrupt handling irqchip: armada-370-xp: Fix MSI interrupt handling
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commit
a50d7156f1
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@ -43,6 +43,7 @@
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#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)
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#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4)
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#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF
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#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << cpuid)
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#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44)
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#define ARMADA_375_PPI_CAUSE (0x10)
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@ -406,19 +407,29 @@ static void armada_370_xp_mpic_handle_cascade_irq(unsigned int irq,
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struct irq_desc *desc)
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{
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struct irq_chip *chip = irq_get_chip(irq);
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unsigned long irqmap, irqn;
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unsigned long irqmap, irqn, irqsrc, cpuid;
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unsigned int cascade_irq;
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chained_irq_enter(chip, desc);
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irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE);
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if (irqmap & BIT(0)) {
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armada_370_xp_handle_msi_irq(NULL, true);
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irqmap &= ~BIT(0);
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}
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cpuid = cpu_logical_map(smp_processor_id());
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for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) {
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irqsrc = readl_relaxed(main_int_base +
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ARMADA_370_XP_INT_SOURCE_CTL(irqn));
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/* Check if the interrupt is not masked on current CPU.
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* Test IRQ (0-1) and FIQ (8-9) mask bits.
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*/
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if (!(irqsrc & ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid)))
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continue;
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if (irqn == 1) {
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armada_370_xp_handle_msi_irq(NULL, true);
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continue;
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}
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cascade_irq = irq_find_mapping(armada_370_xp_mpic_domain, irqn);
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generic_handle_irq(cascade_irq);
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}
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