pm3fb: fillrect acceleration
This is a port of accelerated fillrect function from the 2.4 kernel driver. Signed-off-by: Krzysztof Helt <krzysztof.h1@wp.pl> Signed-off-by: Antonino Daplas <adaplas@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -77,7 +77,7 @@ static struct fb_fix_screeninfo pm3fb_fix __devinitdata = {
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.xpanstep = 1,
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.ypanstep = 1,
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.ywrapstep = 0,
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.accel = FB_ACCEL_NONE,
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.accel = FB_ACCEL_3DLABS_PERMEDIA3,
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};
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/*
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@ -185,6 +185,238 @@ static inline int pm3fb_shift_bpp(unsigned bpp, int v)
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return 0;
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}
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/* acceleration */
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static int pm3fb_sync(struct fb_info *info)
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{
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struct pm3_par *par = info->par;
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PM3_WAIT(par, 2);
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PM3_WRITE_REG(par, PM3FilterMode, PM3FilterModeSync);
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PM3_WRITE_REG(par, PM3Sync, 0);
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mb();
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do {
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while ((PM3_READ_REG(par, PM3OutFIFOWords)) == 0);
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rmb();
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} while ((PM3_READ_REG(par, PM3OutputFifo)) != PM3Sync_Tag);
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return 0;
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}
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static void pm3fb_init_engine(struct fb_info *info)
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{
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struct pm3_par *par = info->par;
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const u32 width = (info->var.xres_virtual + 7) & ~7;
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PM3_WAIT(par, 50);
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PM3_WRITE_REG(par, PM3FilterMode, PM3FilterModeSync);
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PM3_WRITE_REG(par, PM3StatisticMode, 0x0);
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PM3_WRITE_REG(par, PM3DeltaMode, 0x0);
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PM3_WRITE_REG(par, PM3RasterizerMode, 0x0);
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PM3_WRITE_REG(par, PM3ScissorMode, 0x0);
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PM3_WRITE_REG(par, PM3LineStippleMode, 0x0);
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PM3_WRITE_REG(par, PM3AreaStippleMode, 0x0);
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PM3_WRITE_REG(par, PM3GIDMode, 0x0);
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PM3_WRITE_REG(par, PM3DepthMode, 0x0);
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PM3_WRITE_REG(par, PM3StencilMode, 0x0);
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PM3_WRITE_REG(par, PM3StencilData, 0x0);
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PM3_WRITE_REG(par, PM3ColorDDAMode, 0x0);
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PM3_WRITE_REG(par, PM3TextureCoordMode, 0x0);
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PM3_WRITE_REG(par, PM3TextureIndexMode0, 0x0);
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PM3_WRITE_REG(par, PM3TextureIndexMode1, 0x0);
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PM3_WRITE_REG(par, PM3TextureReadMode, 0x0);
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PM3_WRITE_REG(par, PM3LUTMode, 0x0);
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PM3_WRITE_REG(par, PM3TextureFilterMode, 0x0);
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PM3_WRITE_REG(par, PM3TextureCompositeMode, 0x0);
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PM3_WRITE_REG(par, PM3TextureApplicationMode, 0x0);
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PM3_WRITE_REG(par, PM3TextureCompositeColorMode1, 0x0);
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PM3_WRITE_REG(par, PM3TextureCompositeAlphaMode1, 0x0);
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PM3_WRITE_REG(par, PM3TextureCompositeColorMode0, 0x0);
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PM3_WRITE_REG(par, PM3TextureCompositeAlphaMode0, 0x0);
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PM3_WRITE_REG(par, PM3FogMode, 0x0);
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PM3_WRITE_REG(par, PM3ChromaTestMode, 0x0);
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PM3_WRITE_REG(par, PM3AlphaTestMode, 0x0);
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PM3_WRITE_REG(par, PM3AntialiasMode, 0x0);
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PM3_WRITE_REG(par, PM3YUVMode, 0x0);
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PM3_WRITE_REG(par, PM3AlphaBlendColorMode, 0x0);
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PM3_WRITE_REG(par, PM3AlphaBlendAlphaMode, 0x0);
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PM3_WRITE_REG(par, PM3DitherMode, 0x0);
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PM3_WRITE_REG(par, PM3LogicalOpMode, 0x0);
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PM3_WRITE_REG(par, PM3RouterMode, 0x0);
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PM3_WRITE_REG(par, PM3Window, 0x0);
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PM3_WRITE_REG(par, PM3Config2D, 0x0);
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PM3_WRITE_REG(par, PM3SpanColorMask, 0xffffffff);
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PM3_WRITE_REG(par, PM3XBias, 0x0);
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PM3_WRITE_REG(par, PM3YBias, 0x0);
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PM3_WRITE_REG(par, PM3DeltaControl, 0x0);
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PM3_WRITE_REG(par, PM3BitMaskPattern, 0xffffffff);
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PM3_WRITE_REG(par, PM3FBDestReadEnables,
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PM3FBDestReadEnables_E(0xff) |
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PM3FBDestReadEnables_R(0xff) |
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PM3FBDestReadEnables_ReferenceAlpha(0xff));
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PM3_WRITE_REG(par, PM3FBDestReadBufferAddr0, 0x0);
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PM3_WRITE_REG(par, PM3FBDestReadBufferOffset0, 0x0);
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PM3_WRITE_REG(par, PM3FBDestReadBufferWidth0,
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PM3FBDestReadBufferWidth_Width(width));
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PM3_WRITE_REG(par, PM3FBDestReadMode,
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PM3FBDestReadMode_ReadEnable |
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PM3FBDestReadMode_Enable0);
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PM3_WRITE_REG(par, PM3FBSourceReadBufferAddr, 0x0);
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PM3_WRITE_REG(par, PM3FBSourceReadBufferOffset, 0x0);
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PM3_WRITE_REG(par, PM3FBSourceReadBufferWidth,
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PM3FBSourceReadBufferWidth_Width(width));
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PM3_WRITE_REG(par, PM3FBSourceReadMode,
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PM3FBSourceReadMode_Blocking |
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PM3FBSourceReadMode_ReadEnable);
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PM3_WAIT(par, 2);
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{
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unsigned long rm = 1;
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switch (info->var.bits_per_pixel) {
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case 8:
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PM3_WRITE_REG(par, PM3PixelSize,
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PM3PixelSize_GLOBAL_8BIT);
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break;
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case 16:
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PM3_WRITE_REG(par, PM3PixelSize,
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PM3PixelSize_GLOBAL_16BIT);
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break;
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case 32:
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PM3_WRITE_REG(par, PM3PixelSize,
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PM3PixelSize_GLOBAL_32BIT);
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break;
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default:
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DPRINTK(1, "Unsupported depth %d\n",
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info->var.bits_per_pixel);
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break;
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}
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PM3_WRITE_REG(par, PM3RasterizerMode, rm);
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}
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PM3_WAIT(par, 20);
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PM3_WRITE_REG(par, PM3FBSoftwareWriteMask, 0xffffffff);
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PM3_WRITE_REG(par, PM3FBHardwareWriteMask, 0xffffffff);
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PM3_WRITE_REG(par, PM3FBWriteMode,
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PM3FBWriteMode_WriteEnable |
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PM3FBWriteMode_OpaqueSpan |
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PM3FBWriteMode_Enable0);
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PM3_WRITE_REG(par, PM3FBWriteBufferAddr0, 0x0);
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PM3_WRITE_REG(par, PM3FBWriteBufferOffset0, 0x0);
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PM3_WRITE_REG(par, PM3FBWriteBufferWidth0,
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PM3FBWriteBufferWidth_Width(width));
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PM3_WRITE_REG(par, PM3SizeOfFramebuffer, 0x0);
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{
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/* size in lines of FB */
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unsigned long sofb = info->screen_size /
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info->fix.line_length;
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if (sofb > 4095)
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PM3_WRITE_REG(par, PM3SizeOfFramebuffer, 4095);
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else
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PM3_WRITE_REG(par, PM3SizeOfFramebuffer, sofb);
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switch (info->var.bits_per_pixel) {
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case 8:
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PM3_WRITE_REG(par, PM3DitherMode,
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(1 << 10) | (2 << 3));
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break;
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case 16:
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PM3_WRITE_REG(par, PM3DitherMode,
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(1 << 10) | (1 << 3));
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break;
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case 32:
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PM3_WRITE_REG(par, PM3DitherMode,
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(1 << 10) | (0 << 3));
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break;
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default:
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DPRINTK(1, "Unsupported depth %d\n",
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info->current_par->depth);
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break;
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}
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}
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PM3_WRITE_REG(par, PM3dXDom, 0x0);
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PM3_WRITE_REG(par, PM3dXSub, 0x0);
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PM3_WRITE_REG(par, PM3dY, (1 << 16));
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PM3_WRITE_REG(par, PM3StartXDom, 0x0);
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PM3_WRITE_REG(par, PM3StartXSub, 0x0);
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PM3_WRITE_REG(par, PM3StartY, 0x0);
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PM3_WRITE_REG(par, PM3Count, 0x0);
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/* Disable LocalBuffer. better safe than sorry */
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PM3_WRITE_REG(par, PM3LBDestReadMode, 0x0);
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PM3_WRITE_REG(par, PM3LBDestReadEnables, 0x0);
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PM3_WRITE_REG(par, PM3LBSourceReadMode, 0x0);
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PM3_WRITE_REG(par, PM3LBWriteMode, 0x0);
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pm3fb_sync(info);
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}
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static void pm3fb_fillrect (struct fb_info *info,
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const struct fb_fillrect *region)
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{
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struct pm3_par *par = info->par;
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struct fb_fillrect modded;
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int vxres, vyres;
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u32 color = (info->fix.visual == FB_VISUAL_TRUECOLOR) ?
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((u32*)info->pseudo_palette)[region->color] : region->color;
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if (info->state != FBINFO_STATE_RUNNING)
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return;
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if ((info->flags & FBINFO_HWACCEL_DISABLED) ||
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region->rop != ROP_COPY ) {
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cfb_fillrect(info, region);
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return;
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}
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vxres = info->var.xres_virtual;
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vyres = info->var.yres_virtual;
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memcpy(&modded, region, sizeof(struct fb_fillrect));
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if(!modded.width || !modded.height ||
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modded.dx >= vxres || modded.dy >= vyres)
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return;
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if(modded.dx + modded.width > vxres)
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modded.width = vxres - modded.dx;
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if(modded.dy + modded.height > vyres)
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modded.height = vyres - modded.dy;
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if(info->var.bits_per_pixel == 8)
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color |= color << 8;
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if(info->var.bits_per_pixel <= 16)
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color |= color << 16;
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PM3_WAIT(par, 4);
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PM3_WRITE_REG(par, PM3Config2D,
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PM3Config2D_UseConstantSource |
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PM3Config2D_ForegroundROPEnable |
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(PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
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PM3Config2D_FBWriteEnable);
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PM3_WRITE_REG(par, PM3ForegroundColor, color);
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PM3_WRITE_REG(par, PM3RectanglePosition,
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(PM3RectanglePosition_XOffset(modded.dx)) |
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(PM3RectanglePosition_YOffset(modded.dy)));
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PM3_WRITE_REG(par, PM3Render2D,
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PM3Render2D_XPositive |
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PM3Render2D_YPositive |
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PM3Render2D_Operation_Normal |
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PM3Render2D_SpanOperation |
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(PM3Render2D_Width(modded.width)) |
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(PM3Render2D_Height(modded.height)));
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}
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/* end of acceleration functions */
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/* write the mode to registers */
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static void pm3fb_write_mode(struct fb_info *info)
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{
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@ -528,6 +760,7 @@ static int pm3fb_set_par(struct fb_info *info)
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pm3fb_clear_colormap(par, 0, 0, 0);
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PM3_WRITE_DAC_REG(par, PM3RD_CursorMode,
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PM3RD_CursorMode_CURSOR_DISABLE);
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pm3fb_init_engine(info);
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pm3fb_write_mode(info);
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return 0;
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}
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@ -675,10 +908,11 @@ static struct fb_ops pm3fb_ops = {
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.fb_set_par = pm3fb_set_par,
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.fb_setcolreg = pm3fb_setcolreg,
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.fb_pan_display = pm3fb_pan_display,
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.fb_fillrect = cfb_fillrect,
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.fb_fillrect = pm3fb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_blank = pm3fb_blank,
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.fb_sync = pm3fb_sync,
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};
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/* ------------------------------------------------------------------------- */
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@ -847,7 +1081,8 @@ static int __devinit pm3fb_probe(struct pci_dev *dev,
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info->fix = pm3fb_fix;
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info->pseudo_palette = par->palette;
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info->flags = FBINFO_DEFAULT;/* | FBINFO_HWACCEL_YPAN;*/
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info->flags = FBINFO_DEFAULT |
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FBINFO_HWACCEL_FILLRECT;/* | FBINFO_HWACCEL_YPAN;*/
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/*
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* This should give a reasonable default video mode. The following is
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