xtensa: enable HAVE_PERF_EVENTS
This allows the perf tool to monitor kernel tracepoint events. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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@ -19,6 +19,7 @@ config XTENSA
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select HAVE_OPROFILE
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select HAVE_FUNCTION_TRACER
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select HAVE_IRQ_TIME_ACCOUNTING
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select HAVE_PERF_EVENTS
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help
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Xtensa processors are 32-bit RISC machines designed by Tensilica
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primarily for embedded systems. These processors are both
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4
arch/xtensa/include/asm/perf_event.h
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4
arch/xtensa/include/asm/perf_event.h
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@ -0,0 +1,4 @@
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#ifndef __ASM_XTENSA_PERF_EVENT_H
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#define __ASM_XTENSA_PERF_EVENT_H
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#endif /* __ASM_XTENSA_PERF_EVENT_H */
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