drm/radeon: improve soft reset on SI
Disable CG/PG and stop the rlc before resetting. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -85,6 +85,9 @@ extern void si_dma_vm_set_page(struct radeon_device *rdev,
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uint32_t incr, uint32_t flags);
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static void si_enable_gui_idle_interrupt(struct radeon_device *rdev,
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bool enable);
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static void si_fini_pg(struct radeon_device *rdev);
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static void si_fini_cg(struct radeon_device *rdev);
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static void si_rlc_stop(struct radeon_device *rdev);
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static const u32 verde_rlc_save_restore_register_list[] =
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{
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@ -3608,6 +3611,13 @@ static void si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask)
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dev_info(rdev->dev, " VM_CONTEXT1_PROTECTION_FAULT_STATUS 0x%08X\n",
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RREG32(VM_CONTEXT1_PROTECTION_FAULT_STATUS));
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/* disable PG/CG */
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si_fini_pg(rdev);
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si_fini_cg(rdev);
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/* stop the rlc */
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si_rlc_stop(rdev);
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/* Disable CP parsing/prefetching */
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WREG32(CP_ME_CNTL, CP_ME_HALT | CP_PFP_HALT | CP_CE_HALT);
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