Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Ingo Molnar: "This contains three commits to fix memory corruption bugs with certain Apple AirPort cards, plus a fix for a X86_BUG() ID definitions collision bug in asm/cpufeatures.h" * 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/quirks: Add early quirk to reset Apple AirPort card x86/quirks: Reintroduce scanning of secondary buses x86/quirks: Apply nvidia_bugs quirk only on root bus x86/cpu: Fix duplicated X86_BUG(9) macro
This commit is contained in:
commit
a7bf89a1b1
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@ -301,10 +301,6 @@
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#define X86_BUG_FXSAVE_LEAK X86_BUG(6) /* FXSAVE leaks FOP/FIP/FOP */
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#define X86_BUG_CLFLUSH_MONITOR X86_BUG(7) /* AAI65, CLFLUSH required before MONITOR */
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#define X86_BUG_SYSRET_SS_ATTRS X86_BUG(8) /* SYSRET doesn't fix up SS attrs */
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#define X86_BUG_NULL_SEG X86_BUG(9) /* Nulling a selector preserves the base */
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#define X86_BUG_SWAPGS_FENCE X86_BUG(10) /* SWAPGS without input dep on GS */
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#ifdef CONFIG_X86_32
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/*
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* 64-bit kernels don't use X86_BUG_ESPFIX. Make the define conditional
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@ -312,5 +308,7 @@
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*/
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#define X86_BUG_ESPFIX X86_BUG(9) /* "" IRET to 16-bit SS corrupts ESP/RSP high bits */
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#endif
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#define X86_BUG_NULL_SEG X86_BUG(10) /* Nulling a selector preserves the base */
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#define X86_BUG_SWAPGS_FENCE X86_BUG(11) /* SWAPGS without input dep on GS */
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#endif /* _ASM_X86_CPUFEATURES_H */
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@ -11,7 +11,11 @@
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#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/delay.h>
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#include <linux/dmi.h>
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#include <linux/pci_ids.h>
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#include <linux/bcma/bcma.h>
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#include <linux/bcma/bcma_regs.h>
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#include <drm/i915_drm.h>
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#include <asm/pci-direct.h>
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#include <asm/dma.h>
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@ -21,6 +25,9 @@
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#include <asm/iommu.h>
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#include <asm/gart.h>
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#include <asm/irq_remapping.h>
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#include <asm/early_ioremap.h>
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#define dev_err(msg) pr_err("pci 0000:%02x:%02x.%d: %s", bus, slot, func, msg)
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static void __init fix_hypertransport_config(int num, int slot, int func)
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{
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@ -75,6 +82,13 @@ static void __init nvidia_bugs(int num, int slot, int func)
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{
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#ifdef CONFIG_ACPI
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#ifdef CONFIG_X86_IO_APIC
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/*
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* Only applies to Nvidia root ports (bus 0) and not to
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* Nvidia graphics cards with PCI ports on secondary buses.
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*/
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if (num)
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return;
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/*
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* All timer overrides on Nvidia are
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* wrong unless HPET is enabled.
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@ -590,6 +604,61 @@ static void __init force_disable_hpet(int num, int slot, int func)
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#endif
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}
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#define BCM4331_MMIO_SIZE 16384
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#define BCM4331_PM_CAP 0x40
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#define bcma_aread32(reg) ioread32(mmio + 1 * BCMA_CORE_SIZE + reg)
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#define bcma_awrite32(reg, val) iowrite32(val, mmio + 1 * BCMA_CORE_SIZE + reg)
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static void __init apple_airport_reset(int bus, int slot, int func)
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{
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void __iomem *mmio;
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u16 pmcsr;
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u64 addr;
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int i;
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if (!dmi_match(DMI_SYS_VENDOR, "Apple Inc."))
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return;
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/* Card may have been put into PCI_D3hot by grub quirk */
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pmcsr = read_pci_config_16(bus, slot, func, BCM4331_PM_CAP + PCI_PM_CTRL);
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if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) {
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pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
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write_pci_config_16(bus, slot, func, BCM4331_PM_CAP + PCI_PM_CTRL, pmcsr);
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mdelay(10);
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pmcsr = read_pci_config_16(bus, slot, func, BCM4331_PM_CAP + PCI_PM_CTRL);
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if ((pmcsr & PCI_PM_CTRL_STATE_MASK) != PCI_D0) {
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dev_err("Cannot power up Apple AirPort card\n");
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return;
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}
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}
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addr = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
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addr |= (u64)read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_1) << 32;
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addr &= PCI_BASE_ADDRESS_MEM_MASK;
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mmio = early_ioremap(addr, BCM4331_MMIO_SIZE);
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if (!mmio) {
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dev_err("Cannot iomap Apple AirPort card\n");
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return;
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}
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pr_info("Resetting Apple AirPort card (left enabled by EFI)\n");
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for (i = 0; bcma_aread32(BCMA_RESET_ST) && i < 30; i++)
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udelay(10);
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bcma_awrite32(BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
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bcma_aread32(BCMA_RESET_CTL);
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udelay(1);
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bcma_awrite32(BCMA_RESET_CTL, 0);
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bcma_aread32(BCMA_RESET_CTL);
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udelay(10);
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early_iounmap(mmio, BCM4331_MMIO_SIZE);
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}
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#define QFLAG_APPLY_ONCE 0x1
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#define QFLAG_APPLIED 0x2
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@ -603,12 +672,6 @@ struct chipset {
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void (*f)(int num, int slot, int func);
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};
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/*
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* Only works for devices on the root bus. If you add any devices
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* not on bus 0 readd another loop level in early_quirks(). But
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* be careful because at least the Nvidia quirk here relies on
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* only matching on bus 0.
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*/
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static struct chipset early_qrk[] __initdata = {
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{ PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
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PCI_CLASS_BRIDGE_PCI, PCI_ANY_ID, QFLAG_APPLY_ONCE, nvidia_bugs },
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*/
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{ PCI_VENDOR_ID_INTEL, 0x0f00,
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PCI_CLASS_BRIDGE_HOST, PCI_ANY_ID, 0, force_disable_hpet},
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{ PCI_VENDOR_ID_BROADCOM, 0x4331,
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PCI_CLASS_NETWORK_OTHER, PCI_ANY_ID, 0, apple_airport_reset},
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{}
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};
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static void __init early_pci_scan_bus(int bus);
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/**
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* check_dev_quirk - apply early quirks to a given PCI device
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* @num: bus number
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*
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* Check the vendor & device ID against the early quirks table.
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*
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* If the device is single function, let early_quirks() know so we don't
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* If the device is single function, let early_pci_scan_bus() know so we don't
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* poke at this device again.
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*/
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static int __init check_dev_quirk(int num, int slot, int func)
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u16 vendor;
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u16 device;
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u8 type;
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u8 sec;
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int i;
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class = read_pci_config_16(num, slot, func, PCI_CLASS_DEVICE);
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type = read_pci_config_byte(num, slot, func,
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PCI_HEADER_TYPE);
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if ((type & 0x7f) == PCI_HEADER_TYPE_BRIDGE) {
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sec = read_pci_config_byte(num, slot, func, PCI_SECONDARY_BUS);
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if (sec > num)
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early_pci_scan_bus(sec);
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}
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if (!(type & 0x80))
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return -1;
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return 0;
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}
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void __init early_quirks(void)
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static void __init early_pci_scan_bus(int bus)
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{
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int slot, func;
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if (!early_pci_allowed())
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return;
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/* Poor man's PCI discovery */
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/* Only scan the root bus */
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for (slot = 0; slot < 32; slot++)
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for (func = 0; func < 8; func++) {
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/* Only probe function 0 on single fn devices */
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if (check_dev_quirk(0, slot, func))
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if (check_dev_quirk(bus, slot, func))
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break;
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}
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}
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void __init early_quirks(void)
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{
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if (!early_pci_allowed())
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return;
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early_pci_scan_bus(0);
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}
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@ -8,8 +8,6 @@
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#include <linux/bcma/bcma.h>
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#include <linux/delay.h>
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#define BCMA_CORE_SIZE 0x1000
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#define bcma_err(bus, fmt, ...) \
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pr_err("bus%d: " fmt, (bus)->num, ##__VA_ARGS__)
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#define bcma_warn(bus, fmt, ...) \
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#define BCMA_CORE_DEFAULT 0xFFF
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#define BCMA_MAX_NR_CORES 16
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#define BCMA_CORE_SIZE 0x1000
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/* Chip IDs of PCIe devices */
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#define BCMA_CHIP_ID_BCM4313 0x4313
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