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ide: add missing ide_rate_filter() calls to ->speedproc()-s

* Fix icside, cris-ide, au1xxx-ide, amd74xx, via82cxxx and pmac host drivers
  to use ide_rate_filter().

  This results in the following modes (from user requests) being clipped down:
  - invalid modes (values 0x46-0xFF)  [ for all hosts ]
  - unsupported by a host UDMA modes  [ for hosts which support UDMA]
  - all UDMA modes and MWDMA3-4 modes [ for hosts which don't support UDMA ]
  - invalid modes (values 0x25-0x39)  [ for hosts which don't support UDMA ]

* Host driver specific changes in behavior:

  icside:
    - no change

  cris-ide
    - clip unsupported UDMA3-6 modes down
    - fix BUG() on trying to set unsupported UDMA3-6 modes

  au1xxx-ide/pmac
    - clip unsupported UDMA modes down

  amd74xx/via82cxxx
    - clip unsupported UDMA modes down
    - fix random PIO timings being set for unsupported/invalid modes
    - fix unsupported/invalid modes being set on the device

* While at it remove no longer needed checks from pmac.c driver.

Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
wifi-calibration
Bartlomiej Zolnierkiewicz 2007-10-11 23:53:59 +02:00
parent 851dd33bcf
commit a8028fcb48
6 changed files with 11 additions and 10 deletions

View File

@ -255,8 +255,7 @@ static int icside_set_speed(ide_drive_t *drive, u8 xfer_mode)
/*
* Limit the transfer speed to MW_DMA_2.
*/
if (xfer_mode > XFER_MW_DMA_2)
xfer_mode = XFER_MW_DMA_2;
xfer_mode = ide_rate_filter(drive, xfer_mode);
switch (xfer_mode) {
case XFER_MW_DMA_2:

View File

@ -726,6 +726,8 @@ static int speed_cris_ide(ide_drive_t *drive, u8 speed)
{
int cyc = 0, dvs = 0, strobe = 0, hold = 0;
speed = ide_rate_filter(drive, speed);
if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
tune_cris_ide(drive, speed - XFER_PIO_0);
return ide_config_drive_speed(drive, speed);

View File

@ -180,6 +180,8 @@ static int auide_tune_chipset (ide_drive_t *drive, u8 speed)
int mem_sttime;
int mem_stcfg;
speed = ide_rate_filter(drive, speed);
mem_sttime = 0;
mem_stcfg = au_readl(MEM_STCFG2);

View File

@ -240,6 +240,8 @@ static int amd_set_drive(ide_drive_t *drive, u8 speed)
struct ide_timing t, p;
int T, UT;
speed = ide_rate_filter(drive, speed);
if (speed != XFER_PIO_SLOW)
ide_config_drive_speed(drive, speed);

View File

@ -165,6 +165,8 @@ static int via_set_drive(ide_drive_t *drive, u8 speed)
struct ide_timing t, p;
unsigned int T, UT;
speed = ide_rate_filter(drive, speed);
if (speed != XFER_PIO_SLOW)
ide_config_drive_speed(drive, speed);

View File

@ -928,6 +928,8 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
pmac_ide_hwif_t* pmif = (pmac_ide_hwif_t *)HWIF(drive)->hwif_data;
u32 *timings, *timings2;
speed = ide_rate_filter(drive, speed);
if (pmif == NULL)
return 1;
@ -937,17 +939,9 @@ pmac_ide_tune_chipset (ide_drive_t *drive, byte speed)
switch(speed) {
#ifdef CONFIG_BLK_DEV_IDEDMA_PMAC
case XFER_UDMA_6:
if (pmif->kind != controller_sh_ata6)
return 1;
case XFER_UDMA_5:
if (pmif->kind != controller_un_ata6 &&
pmif->kind != controller_k2_ata6 &&
pmif->kind != controller_sh_ata6)
return 1;
case XFER_UDMA_4:
case XFER_UDMA_3:
if (drive->hwif->cbl != ATA_CBL_PATA80)
return 1;
case XFER_UDMA_2:
case XFER_UDMA_1:
case XFER_UDMA_0: