[ARM] pxa: remove periodic mode emulation support
Apparantly, the generic time subsystem can accurately emulate periodic mode via the one-shot support code, so we don't need our own periodic emulation code anymore. Just ensure that we build support for one shot into the generic time subsystem. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -345,6 +345,7 @@ config ARCH_PXA
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select GENERIC_GPIO
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select GENERIC_TIME
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select GENERIC_CLOCKEVENTS
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select TICK_ONESHOT
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help
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Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
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@ -59,55 +59,17 @@ unsigned long long sched_clock(void)
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}
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#define MIN_OSCR_DELTA 16
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static irqreturn_t
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pxa_ost0_interrupt(int irq, void *dev_id)
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{
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int next_match;
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struct clock_event_device *c = dev_id;
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if (c->mode == CLOCK_EVT_MODE_ONESHOT) {
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/* Disarm the compare/match, signal the event. */
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OIER &= ~OIER_E0;
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OSSR = OSSR_M0;
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c->event_handler(c);
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} else if (c->mode == CLOCK_EVT_MODE_PERIODIC) {
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/* Call the event handler as many times as necessary
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* to recover missed events, if any (if we update
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* OSMR0 and OSCR0 is still ahead of us, we've missed
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* the event). As we're dealing with that, re-arm the
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* compare/match for the next event.
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*
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* HACK ALERT:
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*
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* There's a latency between the instruction that
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* writes to OSMR0 and the actual commit to the
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* physical hardware, because the CPU doesn't (have
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* to) run at bus speed, there's a write buffer
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* between the CPU and the bus, etc. etc. So if the
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* target OSCR0 is "very close", to the OSMR0 load
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* value, the update to OSMR0 might not get to the
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* hardware in time and we'll miss that interrupt.
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*
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* To be safe, if the new OSMR0 is "very close" to the
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* target OSCR0 value, we call the event_handler as
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* though the event actually happened. According to
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* Nico's comment in the previous version of this
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* code, experience has shown that 6 OSCR ticks is
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* "very close" but he went with 8. We will use 16,
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* based on the results of testing on PXA270.
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*
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* To be doubly sure, we also tell clkevt via
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* clockevents_register_device() not to ask for
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* anything that might put us "very close".
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*/
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#define MIN_OSCR_DELTA 16
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do {
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OSSR = OSSR_M0;
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next_match = (OSMR0 += LATCH);
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c->event_handler(c);
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} while (((signed long)(next_match - OSCR) <= MIN_OSCR_DELTA)
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&& (c->mode == CLOCK_EVT_MODE_PERIODIC));
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}
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/* Disarm the compare/match, signal the event. */
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OIER &= ~OIER_E0;
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OSSR = OSSR_M0;
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c->event_handler(c);
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return IRQ_HANDLED;
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}
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@ -133,14 +95,6 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
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unsigned long irqflags;
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switch (mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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raw_local_irq_save(irqflags);
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OSSR = OSSR_M0;
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OIER |= OIER_E0;
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OSMR0 = OSCR + LATCH;
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raw_local_irq_restore(irqflags);
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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raw_local_irq_save(irqflags);
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OIER &= ~OIER_E0;
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@ -158,13 +112,14 @@ pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
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break;
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case CLOCK_EVT_MODE_RESUME:
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case CLOCK_EVT_MODE_PERIODIC:
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break;
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}
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}
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static struct clock_event_device ckevt_pxa_osmr0 = {
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.name = "osmr0",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.features = CLOCK_EVT_FEAT_ONESHOT,
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.shift = 32,
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.rating = 200,
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.cpumask = CPU_MASK_CPU0,
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