[ARM] smp: separate SCU support code from realview
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -861,6 +861,7 @@ config SMP
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depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
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depends on GENERIC_CLOCKEVENTS
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select USE_GENERIC_SMP_HELPERS
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select HAVE_ARM_SCU if ARCH_REALVIEW
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help
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This enables support for systems with more than one CPU. If you have
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a system with only one CPU, like most personal computers, say N. If
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@ -878,6 +879,12 @@ config SMP
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If you don't know what to do here, say N.
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config HAVE_ARM_SCU
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bool
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depends on SMP
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help
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This option enables support for the ARM system coherency unit
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choice
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prompt "Memory split"
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default VMSPLIT_3G
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@ -1,13 +1,7 @@
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#ifndef __ASMARM_ARCH_SCU_H
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#define __ASMARM_ARCH_SCU_H
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/*
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* SCU registers
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*/
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#define SCU_CTRL 0x00
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#define SCU_CONFIG 0x04
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#define SCU_CPU_STATUS 0x08
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#define SCU_INVALIDATE 0x0c
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#define SCU_FPGA_REVISION 0x10
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unsigned int scu_get_core_count(void __iomem *);
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void scu_enable(void __iomem *);
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#endif
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@ -22,6 +22,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o
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obj-$(CONFIG_ISA_DMA) += dma-isa.o
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obj-$(CONFIG_PCI) += bios32.o isa.o
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obj-$(CONFIG_SMP) += smp.o
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obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o
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obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o
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41
arch/arm/kernel/smp_scu.c
Normal file
41
arch/arm/kernel/smp_scu.c
Normal file
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@ -0,0 +1,41 @@
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/*
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* linux/arch/arm/kernel/smp_scu.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/io.h>
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#include <asm/smp_scu.h>
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#define SCU_CTRL 0x00
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#define SCU_CONFIG 0x04
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#define SCU_CPU_STATUS 0x08
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#define SCU_INVALIDATE 0x0c
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#define SCU_FPGA_REVISION 0x10
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/*
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* Get the number of CPU cores from the SCU configuration
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*/
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unsigned int __init scu_get_core_count(void __iomem *scu_base)
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{
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unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG);
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return (ncores & 0x03) + 1;
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}
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/*
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* Enable the SCU
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*/
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void __init scu_enable(void __iomem *scu_base)
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{
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u32 scu_ctrl;
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scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
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scu_ctrl |= 1;
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__raw_writel(scu_ctrl, scu_base + SCU_CTRL);
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}
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@ -45,31 +45,12 @@ static void __iomem *scu_base_addr(void)
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return (void __iomem *)0;
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}
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static unsigned int __init get_core_count(void)
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static inline unsigned int get_core_count(void)
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{
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unsigned int ncores;
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void __iomem *scu_base = scu_base_addr();
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if (scu_base) {
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ncores = __raw_readl(scu_base + SCU_CONFIG);
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ncores = (ncores & 0x03) + 1;
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} else
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ncores = 1;
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return ncores;
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}
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/*
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* Setup the SCU
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*/
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static void scu_enable(void)
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{
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u32 scu_ctrl;
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void __iomem *scu_base = scu_base_addr();
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scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
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scu_ctrl |= 1;
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__raw_writel(scu_ctrl, scu_base + SCU_CTRL);
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if (scu_base)
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return scu_get_core_count(scu_base);
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return 1;
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}
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static DEFINE_SPINLOCK(boot_lock);
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@ -239,7 +220,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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*/
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percpu_timer_setup();
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scu_enable();
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scu_enable(scu_base_addr());
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poke_milo();
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}
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}
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