ASoC: tegra: set a sensible initial clock rate

Initialize the audio clock tree appropriately for some reasonable rate.
This makes sure the PLLs etc. are actually programmed to something
reasonable when the audio driver is loaded.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Stephen Warren 2012-04-06 11:18:16 -06:00 committed by Mark Brown
parent 17933db2e4
commit a9005b67b3

View file

@ -133,8 +133,14 @@ int tegra_asoc_utils_init(struct tegra_asoc_utils_data *data,
goto err_put_pll_a_out0;
}
ret = tegra_asoc_utils_set_rate(data, 44100, 256 * 44100);
if (ret)
goto err_put_cdev1;
return 0;
err_put_cdev1:
clk_put(data->clk_cdev1);
err_put_pll_a_out0:
clk_put(data->clk_pll_a_out0);
err_put_pll_a: