r8152: combine PHY reset with set_speed
PHY reset is necessary after some hw settings. However, it would cause the linking down, and so does the set_speed function. Combine the PHY reset with set_speed function. That could reduce the frequency of linking down and accessing the PHY register. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -436,6 +436,7 @@ enum rtl8152_flags {
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RTL8152_SET_RX_MODE,
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WORK_ENABLE,
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RTL8152_LINK_CHG,
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PHY_RESET,
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};
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/* Define these values to match your device */
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@ -1796,6 +1797,29 @@ static void r8152_power_cut_en(struct r8152 *tp, bool enable)
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}
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static void rtl_phy_reset(struct r8152 *tp)
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{
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u16 data;
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int i;
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clear_bit(PHY_RESET, &tp->flags);
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data = r8152_mdio_read(tp, MII_BMCR);
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/* don't reset again before the previous one complete */
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if (data & BMCR_RESET)
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return;
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data |= BMCR_RESET;
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r8152_mdio_write(tp, MII_BMCR, data);
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for (i = 0; i < 50; i++) {
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msleep(20);
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if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
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break;
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}
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}
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static void rtl_clear_bp(struct r8152 *tp)
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{
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ocp_write_dword(tp, MCU_TYPE_PLA, PLA_BP_0, 0);
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@ -1854,6 +1878,7 @@ static void r8152b_hw_phy_cfg(struct r8152 *tp)
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}
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r8152b_disable_aldps(tp);
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set_bit(PHY_RESET, &tp->flags);
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}
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static void r8152b_exit_oob(struct r8152 *tp)
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@ -2042,6 +2067,8 @@ static void r8153_hw_phy_cfg(struct r8152 *tp)
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data = sram_read(tp, SRAM_10M_AMP2);
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data |= AMP_DN;
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sram_write(tp, SRAM_10M_AMP2, data);
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set_bit(PHY_RESET, &tp->flags);
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}
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static void r8153_u1u2en(struct r8152 *tp, bool enable)
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@ -2295,12 +2322,26 @@ static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
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bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
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}
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if (test_bit(PHY_RESET, &tp->flags))
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bmcr |= BMCR_RESET;
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if (tp->mii.supports_gmii)
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r8152_mdio_write(tp, MII_CTRL1000, gbcr);
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r8152_mdio_write(tp, MII_ADVERTISE, anar);
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r8152_mdio_write(tp, MII_BMCR, bmcr);
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if (test_bit(PHY_RESET, &tp->flags)) {
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int i;
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clear_bit(PHY_RESET, &tp->flags);
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for (i = 0; i < 50; i++) {
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msleep(20);
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if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
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break;
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}
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}
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out:
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return ret;
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@ -2364,6 +2405,10 @@ static void rtl_work_func_t(struct work_struct *work)
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if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
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_rtl8152_set_rx_mode(tp->netdev);
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if (test_bit(PHY_RESET, &tp->flags))
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rtl_phy_reset(tp);
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out1:
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return;
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}
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@ -2459,7 +2504,6 @@ static void r8152b_enable_fc(struct r8152 *tp)
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static void r8152b_init(struct r8152 *tp)
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{
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u32 ocp_data;
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int i;
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rtl_clear_bp(tp);
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@ -2491,14 +2535,6 @@ static void r8152b_init(struct r8152 *tp)
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r8152b_enable_aldps(tp);
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r8152b_enable_fc(tp);
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r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
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BMCR_ANRESTART);
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for (i = 0; i < 100; i++) {
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udelay(100);
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if (!(r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET))
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break;
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}
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/* enable rx aggregation */
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ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
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ocp_data &= ~RX_AGG_DISABLE;
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@ -2569,9 +2605,6 @@ static void r8153_init(struct r8152 *tp)
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r8153_enable_eee(tp);
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r8153_enable_aldps(tp);
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r8152b_enable_fc(tp);
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r8152_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE |
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BMCR_ANRESTART);
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}
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static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
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