arm: at91: Cleanup irq chip
Avoid the whole lazy disable dance in the demux handler by providing a irq_disable() callback. Use the proper accessor functions and tidy up gpio_irq_handler() Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -375,6 +375,7 @@ static int gpio_irq_type(struct irq_data *d, unsigned type)
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static struct irq_chip gpio_irqchip = {
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.name = "GPIO",
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.irq_disable = gpio_irq_mask,
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.irq_mask = gpio_irq_mask,
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.irq_unmask = gpio_irq_unmask,
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.irq_set_type = gpio_irq_type,
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@ -384,16 +385,14 @@ static struct irq_chip gpio_irqchip = {
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static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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{
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unsigned pin;
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struct irq_desc *gpio;
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struct at91_gpio_chip *at91_gpio;
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void __iomem *pio;
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struct irq_data *idata = irq_desc_get_irq_data(desc);
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struct irq_chip *chip = irq_data_get_irq_chip(idata);
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struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(idata);
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void __iomem *pio = at91_gpio->regbase;
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u32 isr;
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at91_gpio = get_irq_chip_data(irq);
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pio = at91_gpio->regbase;
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/* temporarily mask (level sensitive) parent IRQ */
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desc->irq_data.chip->irq_ack(&desc->irq_data);
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chip->irq_ack(idata);
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for (;;) {
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/* Reading ISR acks pending (edge triggered) GPIO interrupts.
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* When there none are pending, we're finished unless we need
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@ -409,27 +408,15 @@ static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
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}
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pin = at91_gpio->chip.base;
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gpio = &irq_desc[pin];
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while (isr) {
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if (isr & 1) {
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if (unlikely(gpio->depth)) {
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/*
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* The core ARM interrupt handler lazily disables IRQs so
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* another IRQ must be generated before it actually gets
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* here to be disabled on the GPIO controller.
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*/
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gpio_irq_mask(irq_get_irq_data(pin));
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}
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else
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generic_handle_irq(pin);
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}
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if (isr & 1)
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generic_handle_irq(pin);
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pin++;
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gpio++;
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isr >>= 1;
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}
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}
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desc->irq_data.chip->irq_unmask(&desc->irq_data);
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chip->irq_unmask(idata);
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/* now it may re-trigger */
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}
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