ARM: dts: exynos: Add entries for sound support on Odroid-XU board
This patch adds device nodes for the AUDSS clock controller, peripheral DMA 0/1 controllers and the Audio Subsystem I2S controller. These entries are required for sound support on Odroid-XU board. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
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@ -15,6 +15,7 @@
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#include <dt-bindings/clock/maxim,max77802.h>
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#include <dt-bindings/clock/maxim,max77802.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/sound/samsung-i2s.h>
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#include "exynos54xx-odroidxu-leds.dtsi"
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#include "exynos54xx-odroidxu-leds.dtsi"
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/ {
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/ {
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@ -57,6 +58,61 @@
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compatible = "samsung,secure-firmware";
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compatible = "samsung,secure-firmware";
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reg = <0x02073000 0x1000>;
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reg = <0x02073000 0x1000>;
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};
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};
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sound: sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Odroid-XU";
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simple-audio-card,widgets =
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"Headphone", "Headphone Jack",
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"Speakers", "Speakers";
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simple-audio-card,routing =
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"Headphone Jack", "HPL",
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"Headphone Jack", "HPR",
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"Headphone Jack", "MICBIAS",
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"IN1", "Headphone Jack",
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"Speakers", "SPKL",
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"Speakers", "SPKR";
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simple-audio-card,format = "i2s";
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simple-audio-card,bitclock-master = <&link0_codec>;
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simple-audio-card,frame-master = <&link0_codec>;
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simple-audio-card,cpu {
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sound-dai = <&audi2s0 0>;
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system-clock-frequency = <19200000>;
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};
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link0_codec: simple-audio-card,codec {
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sound-dai = <&max98090>;
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clocks = <&audi2s0 CLK_I2S_CDCLK>;
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};
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};
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};
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&audi2s0 {
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status = "okay";
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};
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&clock {
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clocks = <&fin_pll>;
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assigned-clocks = <&clock CLK_FOUT_EPLL>;
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assigned-clock-rates = <192000000>;
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};
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&clock_audss {
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assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
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<&clock_audss EXYNOS_MOUT_I2S>,
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<&clock_audss EXYNOS_DOUT_SRP>,
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<&clock_audss EXYNOS_DOUT_AUD_BUS>;
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assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
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<&clock_audss EXYNOS_MOUT_AUDSS>;
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assigned-clock-rates = <0>,
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<0>,
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<96000000>,
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<19200000>;
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};
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};
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&cpu0_thermal {
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&cpu0_thermal {
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@ -440,6 +496,19 @@
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};
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};
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};
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};
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&i2c_1 {
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status = "okay";
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max98090: max98090@10 {
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compatible = "maxim,max98090";
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reg = <0x10>;
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interrupt-parent = <&gpj3>;
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interrupts = <0 IRQ_TYPE_NONE>;
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clocks = <&audi2s0 CLK_I2S_CDCLK>;
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clock-names = "mclk";
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#sound-dai-cells = <0>;
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};
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};
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&mmc_0 {
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&mmc_0 {
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status = "okay";
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status = "okay";
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mmc-pwrseq = <&emmc_pwrseq>;
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mmc-pwrseq = <&emmc_pwrseq>;
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@ -615,4 +615,13 @@
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <2>;
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#interrupt-cells = <2>;
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};
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};
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audi2s0_bus: audi2s0-bus {
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samsung,pins = "gpz-0", "gpz-1", "gpz-2", "gpz-3",
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"gpz-4";
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samsung,pin-function = <2>;
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samsung,pin-pud = <0>;
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samsung,pin-drv = <0>;
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};
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};
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};
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@ -16,6 +16,7 @@
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#include "exynos54xx.dtsi"
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#include "exynos54xx.dtsi"
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#include "exynos-syscon-restart.dtsi"
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#include "exynos-syscon-restart.dtsi"
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#include <dt-bindings/clock/exynos5410.h>
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#include <dt-bindings/clock/exynos5410.h>
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#include <dt-bindings/clock/exynos-audss-clk.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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/ {
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@ -82,6 +83,14 @@
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#clock-cells = <1>;
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#clock-cells = <1>;
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};
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};
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clock_audss: audss-clock-controller@3810000 {
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compatible = "samsung,exynos5410-audss-clock";
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reg = <0x03810000 0x0C>;
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#clock-cells = <1>;
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clocks = <&fin_pll>, <&clock CLK_FOUT_EPLL>;
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clock-names = "pll_ref", "pll_in";
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};
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tmu_cpu0: tmu@10060000 {
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tmu_cpu0: tmu@10060000 {
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compatible = "samsung,exynos5420-tmu";
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compatible = "samsung,exynos5420-tmu";
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reg = <0x10060000 0x100>;
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reg = <0x10060000 0x100>;
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@ -183,6 +192,56 @@
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reg = <0x03860000 0x1000>;
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reg = <0x03860000 0x1000>;
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interrupts = <0 47 0>;
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interrupts = <0 47 0>;
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};
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};
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amba {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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ranges;
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pdma0: pdma@12680000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121A0000 0x1000>;
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interrupts = <GIC_SPI 34 IRQ_TYPE_NONE>;
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clocks = <&clock CLK_PDMA0>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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};
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pdma1: pdma@12690000 {
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compatible = "arm,pl330", "arm,primecell";
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reg = <0x121B0000 0x1000>;
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interrupts = <GIC_SPI 35 IRQ_TYPE_NONE>;
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clocks = <&clock CLK_PDMA1>;
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clock-names = "apb_pclk";
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#dma-cells = <1>;
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#dma-channels = <8>;
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#dma-requests = <32>;
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};
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};
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audi2s0: i2s@03830000 {
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compatible = "samsung,exynos5420-i2s";
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reg = <0x03830000 0x100>;
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dmas = <&pdma0 10
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&pdma0 9
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&pdma0 8>;
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dma-names = "tx", "rx", "tx-sec";
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clocks = <&clock_audss EXYNOS_I2S_BUS>,
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<&clock_audss EXYNOS_I2S_BUS>,
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<&clock_audss EXYNOS_SCLK_I2S>;
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clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
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#clock-cells = <1>;
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clock-output-names = "i2s_cdclk0";
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#sound-dai-cells = <1>;
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samsung,idma-addr = <0x03000000>;
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pinctrl-names = "default";
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pinctrl-0 = <&audi2s0_bus>;
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status = "disabled";
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};
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};
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};
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thermal-zones {
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thermal-zones {
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