irqchip/irq-bcm2836: Add support for DT interrupt polarity
In order to properly define the polarity of the per-cpu interrupts, we need to support for a second property cell. But this must be optional to keep backward compatibility with old DT blobs. Suggested-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Stefan Wahren <stefan.wahren@i2se.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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@ -98,13 +98,35 @@ static struct irq_chip bcm2836_arm_irqchip_gpu = {
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.irq_unmask = bcm2836_arm_irqchip_unmask_gpu_irq,
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};
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static void bcm2836_arm_irqchip_register_irq(int hwirq, struct irq_chip *chip)
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static int bcm2836_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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int irq = irq_create_mapping(intc.domain, hwirq);
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struct irq_chip *chip;
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switch (hw) {
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case LOCAL_IRQ_CNTPSIRQ:
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case LOCAL_IRQ_CNTPNSIRQ:
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case LOCAL_IRQ_CNTHPIRQ:
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case LOCAL_IRQ_CNTVIRQ:
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chip = &bcm2836_arm_irqchip_timer;
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break;
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case LOCAL_IRQ_GPU_FAST:
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chip = &bcm2836_arm_irqchip_gpu;
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break;
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case LOCAL_IRQ_PMU_FAST:
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chip = &bcm2836_arm_irqchip_pmu;
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break;
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default:
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pr_warn_once("Unexpected hw irq: %lu\n", hw);
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return -EINVAL;
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}
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irq_set_percpu_devid(irq);
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irq_set_chip_and_handler(irq, chip, handle_percpu_devid_irq);
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irq_domain_set_info(d, irq, hw, chip, d->host_data,
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handle_percpu_devid_irq, NULL, NULL);
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irq_set_status_flags(irq, IRQ_NOAUTOEN);
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return 0;
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}
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static void
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@ -165,7 +187,8 @@ static int bcm2836_cpu_dying(unsigned int cpu)
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#endif
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static const struct irq_domain_ops bcm2836_arm_irqchip_intc_ops = {
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.xlate = irq_domain_xlate_onecell
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.xlate = irq_domain_xlate_onetwocell,
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.map = bcm2836_map,
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};
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static void
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@ -218,19 +241,6 @@ static int __init bcm2836_arm_irqchip_l1_intc_of_init(struct device_node *node,
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if (!intc.domain)
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panic("%pOF: unable to create IRQ domain\n", node);
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bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTPSIRQ,
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&bcm2836_arm_irqchip_timer);
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bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTPNSIRQ,
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&bcm2836_arm_irqchip_timer);
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bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTHPIRQ,
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&bcm2836_arm_irqchip_timer);
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bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_CNTVIRQ,
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&bcm2836_arm_irqchip_timer);
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bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_GPU_FAST,
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&bcm2836_arm_irqchip_gpu);
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bcm2836_arm_irqchip_register_irq(LOCAL_IRQ_PMU_FAST,
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&bcm2836_arm_irqchip_pmu);
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bcm2836_arm_irqchip_smp_init();
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set_handle_irq(bcm2836_arm_irqchip_handle_irq);
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