Merge remote-tracking branch 'kumar/merge' into merge
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commit
aec49c7c0e
43
arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
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43
arch/powerpc/boot/dts/fsl/pq3-mpic-message-B.dtsi
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@ -0,0 +1,43 @@
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/*
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* PQ3 MPIC Message (Group B) device tree stub [ controller @ offset 0x42400 ]
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*
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* Copyright 2012 Freescale Semiconductor Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of Freescale Semiconductor nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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*
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* ALTERNATIVELY, this software may be distributed under the terms of the
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* GNU General Public License ("GPL") as published by the Free Software
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* Foundation, either version 2 of that License or (at your option) any
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* later version.
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*
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* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
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* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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message@42400 {
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compatible = "fsl,mpic-v3.1-msgr";
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reg = <0x42400 0x200>;
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interrupts = <
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0xb4 2 0 0
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0xb5 2 0 0
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0xb6 2 0 0
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0xb7 2 0 0>;
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};
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@ -53,6 +53,16 @@ timer@41100 {
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3 0 3 0>;
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};
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message@41400 {
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compatible = "fsl,mpic-v3.1-msgr";
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reg = <0x41400 0x200>;
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interrupts = <
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0xb0 2 0 0
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0xb1 2 0 0
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0xb2 2 0 0
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0xb3 2 0 0>;
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};
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msi@41600 {
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compatible = "fsl,mpic-msi";
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reg = <0x41600 0x80>;
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@ -13,6 +13,7 @@
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#include <linux/types.h>
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#include <linux/spinlock.h>
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#include <asm/smp.h>
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struct mpic_msgr {
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u32 __iomem *base;
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@ -15,11 +15,6 @@
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#ifndef __ASM_POWERPC_REG_BOOKE_H__
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#define __ASM_POWERPC_REG_BOOKE_H__
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#ifdef CONFIG_BOOKE_WDT
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extern u32 booke_wdt_enabled;
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extern u32 booke_wdt_period;
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#endif /* CONFIG_BOOKE_WDT */
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/* Machine State Register (MSR) Fields */
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#define MSR_GS (1<<28) /* Guest state */
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#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
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@ -150,6 +150,9 @@ notrace void __init machine_init(u64 dt_ptr)
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}
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#ifdef CONFIG_BOOKE_WDT
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extern u32 booke_wdt_enabled;
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extern u32 booke_wdt_period;
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/* Checks wdt=x and wdt_period=xx command-line option */
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notrace int __init early_parse_wdt(char *p)
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{
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@ -21,6 +21,12 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = {
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{ .compatible = "fsl,qe", },
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{ .compatible = "fsl,cpm2", },
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{ .compatible = "fsl,srio", },
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/* So that the DMA channel nodes can be probed individually: */
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{ .compatible = "fsl,eloplus-dma", },
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/* For the PMC driver */
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{ .compatible = "fsl,mpc8548-guts", },
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/* Probably unnecessary? */
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{ .compatible = "gpio-leds", },
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{},
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};
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@ -399,12 +399,6 @@ static int __init board_fixups(void)
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machine_arch_initcall(mpc8568_mds, board_fixups);
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machine_arch_initcall(mpc8569_mds, board_fixups);
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static struct of_device_id mpc85xx_ids[] = {
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{ .compatible = "fsl,mpc8548-guts", },
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{ .compatible = "gpio-leds", },
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{},
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};
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static int __init mpc85xx_publish_devices(void)
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{
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if (machine_is(mpc8568_mds))
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@ -412,10 +406,7 @@ static int __init mpc85xx_publish_devices(void)
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if (machine_is(mpc8569_mds))
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simple_gpiochip_init("fsl,mpc8569mds-bcsr-gpio");
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mpc85xx_common_publish_devices();
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of_platform_bus_probe(NULL, mpc85xx_ids, NULL);
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return 0;
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return mpc85xx_common_publish_devices();
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}
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machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
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@ -460,18 +460,7 @@ static void __init p1022_ds_setup_arch(void)
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pr_info("Freescale P1022 DS reference board\n");
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}
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static struct of_device_id __initdata p1022_ds_ids[] = {
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/* So that the DMA channel nodes can be probed individually: */
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{ .compatible = "fsl,eloplus-dma", },
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{},
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};
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static int __init p1022_ds_publish_devices(void)
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{
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mpc85xx_common_publish_devices();
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return of_platform_bus_probe(NULL, p1022_ds_ids, NULL);
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}
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machine_device_initcall(p1022_ds, p1022_ds_publish_devices);
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machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
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machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
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@ -27,6 +27,7 @@
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static struct mpic_msgr **mpic_msgrs;
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static unsigned int mpic_msgr_count;
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static DEFINE_RAW_SPINLOCK(msgrs_lock);
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static inline void _mpic_msgr_mer_write(struct mpic_msgr *msgr, u32 value)
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{
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if (reg_num >= mpic_msgr_count)
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return ERR_PTR(-ENODEV);
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raw_spin_lock_irqsave(&msgr->lock, flags);
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if (mpic_msgrs[reg_num]->in_use == MSGR_FREE) {
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msgr = mpic_msgrs[reg_num];
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raw_spin_lock_irqsave(&msgrs_lock, flags);
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msgr = mpic_msgrs[reg_num];
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if (msgr->in_use == MSGR_FREE)
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msgr->in_use = MSGR_INUSE;
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}
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raw_spin_unlock_irqrestore(&msgr->lock, flags);
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raw_spin_unlock_irqrestore(&msgrs_lock, flags);
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return msgr;
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}
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reg_number = block_number * MPIC_MSGR_REGISTERS_PER_BLOCK + i;
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msgr->base = msgr_block_addr + i * MPIC_MSGR_STRIDE;
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msgr->mer = msgr->base + MPIC_MSGR_MER_OFFSET;
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msgr->mer = (u32 *)((u8 *)msgr->base + MPIC_MSGR_MER_OFFSET);
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msgr->in_use = MSGR_FREE;
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msgr->num = i;
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raw_spin_lock_init(&msgr->lock);
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