sh: clkfwk: module_clk -> peripheral_clk rename.
For consistenct naming, and to allow us to fix up some confusion in the SH-Mobile clock framework, amongst other places. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
parent
fd5b12458b
commit
af777ce42d
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@ -50,8 +50,8 @@ static struct clk master_clk = {
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.rate = CONFIG_SH_PCLK_FREQ,
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};
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static struct clk module_clk = {
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.name = "module_clk",
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static struct clk peripheral_clk = {
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.name = "peripheral_clk",
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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@ -73,7 +73,7 @@ static struct clk cpu_clk = {
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*/
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static struct clk *onchip_clocks[] = {
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&master_clk,
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&module_clk,
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&peripheral_clk,
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&bus_clk,
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&cpu_clk,
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};
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@ -115,7 +115,7 @@ static struct sh_timer_config cmt0_platform_data = {
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.name = "CMT0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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@ -147,7 +147,7 @@ static struct sh_timer_config cmt1_platform_data = {
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.name = "CMT1",
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.channel_offset = 0x08,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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@ -118,7 +118,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
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.name = "MTU2_0",
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.channel_offset = -0x80,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -149,7 +149,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
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.name = "MTU2_1",
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.channel_offset = -0x100,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -180,7 +180,7 @@ static struct sh_timer_config mtu2_2_platform_data = {
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.name = "MTU2_2",
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.channel_offset = 0x80,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -255,7 +255,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
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.name = "MTU2_0",
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.channel_offset = -0x80,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -286,7 +286,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
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.name = "MTU2_1",
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.channel_offset = -0x100,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -317,7 +317,7 @@ static struct sh_timer_config mtu2_2_platform_data = {
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.name = "MTU2_2",
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.channel_offset = 0x80,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -211,7 +211,7 @@ static struct sh_timer_config cmt0_platform_data = {
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.name = "CMT0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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@ -243,7 +243,7 @@ static struct sh_timer_config cmt1_platform_data = {
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.name = "CMT1",
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.channel_offset = 0x08,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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@ -275,7 +275,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
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.name = "MTU2_0",
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.channel_offset = -0x80,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -306,7 +306,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
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.name = "MTU2_1",
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.channel_offset = -0x100,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -171,7 +171,7 @@ static struct sh_timer_config cmt0_platform_data = {
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.name = "CMT0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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@ -203,7 +203,7 @@ static struct sh_timer_config cmt1_platform_data = {
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.name = "CMT1",
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.channel_offset = 0x08,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 0, /* disabled due to code generation issues */
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};
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@ -235,7 +235,7 @@ static struct sh_timer_config mtu2_0_platform_data = {
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.name = "MTU2_0",
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.channel_offset = -0x80,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -266,7 +266,7 @@ static struct sh_timer_config mtu2_1_platform_data = {
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.name = "MTU2_1",
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.channel_offset = -0x100,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -297,7 +297,7 @@ static struct sh_timer_config mtu2_2_platform_data = {
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.name = "MTU2_2",
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.channel_offset = 0x80,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -121,7 +121,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -152,7 +152,7 @@ static struct sh_timer_config tmu1_platform_data = {
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.name = "TMU1",
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.channel_offset = 0xe,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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@ -183,7 +183,7 @@ static struct sh_timer_config tmu2_platform_data = {
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.name = "TMU2",
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.channel_offset = 0x1a,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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@ -149,7 +149,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -180,7 +180,7 @@ static struct sh_timer_config tmu1_platform_data = {
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.name = "TMU1",
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.channel_offset = 0xe,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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@ -211,7 +211,7 @@ static struct sh_timer_config tmu2_platform_data = {
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.name = "TMU2",
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.channel_offset = 0x1a,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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@ -125,7 +125,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -156,7 +156,7 @@ static struct sh_timer_config tmu1_platform_data = {
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.name = "TMU1",
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.channel_offset = 0xe,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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@ -187,7 +187,7 @@ static struct sh_timer_config tmu2_platform_data = {
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.name = "TMU2",
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.channel_offset = 0x1a,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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@ -128,7 +128,7 @@ static struct sh_timer_config cmt0_platform_data = {
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.name = "CMT0",
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.channel_offset = 0x10,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 125,
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.clocksource_rating = 125,
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};
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@ -160,7 +160,7 @@ static struct sh_timer_config cmt1_platform_data = {
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.name = "CMT1",
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.channel_offset = 0x20,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource cmt1_resources[] = {
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@ -190,7 +190,7 @@ static struct sh_timer_config cmt2_platform_data = {
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.name = "CMT2",
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.channel_offset = 0x30,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource cmt2_resources[] = {
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@ -220,7 +220,7 @@ static struct sh_timer_config cmt3_platform_data = {
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.name = "CMT3",
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.channel_offset = 0x40,
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.timer_bit = 3,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource cmt3_resources[] = {
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@ -250,7 +250,7 @@ static struct sh_timer_config cmt4_platform_data = {
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.name = "CMT4",
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.channel_offset = 0x50,
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.timer_bit = 4,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource cmt4_resources[] = {
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@ -280,7 +280,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x02,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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.name = "TMU1",
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.channel_offset = 0xe,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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@ -342,7 +342,7 @@ static struct sh_timer_config tmu2_platform_data = {
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.name = "TMU2",
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.channel_offset = 0x1a,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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@ -38,7 +38,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x04,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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.name = "TMU1",
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.channel_offset = 0x10,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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.name = "TMU2",
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.channel_offset = 0x1c,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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@ -65,7 +65,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x04,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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.name = "TMU1",
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.channel_offset = 0x10,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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.name = "TMU2",
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.channel_offset = 0x1c,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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.name = "TMU3",
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.channel_offset = 0x04,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu3_resources[] = {
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.name = "TMU4",
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.channel_offset = 0x10,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu4_resources[] = {
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@ -164,7 +164,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x04,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -195,7 +195,7 @@ static struct sh_timer_config tmu1_platform_data = {
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.name = "TMU1",
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.channel_offset = 0x10,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
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};
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@ -226,7 +226,7 @@ static struct sh_timer_config tmu2_platform_data = {
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.name = "TMU2",
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.channel_offset = 0x1c,
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.timer_bit = 2,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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};
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static struct resource tmu2_resources[] = {
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@ -118,7 +118,7 @@ static struct sh_timer_config tmu0_platform_data = {
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.name = "TMU0",
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.channel_offset = 0x04,
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.timer_bit = 0,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clockevent_rating = 200,
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};
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@ -149,7 +149,7 @@ static struct sh_timer_config tmu1_platform_data = {
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.name = "TMU1",
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.channel_offset = 0x10,
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.timer_bit = 1,
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.clk = "module_clk",
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.clk = "peripheral_clk",
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.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -180,7 +180,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
@ -210,7 +210,7 @@ static struct sh_timer_config tmu3_platform_data = {
|
|||
.name = "TMU3",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu3_resources[] = {
|
||||
|
@ -240,7 +240,7 @@ static struct sh_timer_config tmu4_platform_data = {
|
|||
.name = "TMU4",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu4_resources[] = {
|
||||
|
@ -270,7 +270,7 @@ static struct sh_timer_config tmu5_platform_data = {
|
|||
.name = "TMU5",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu5_resources[] = {
|
||||
|
|
|
@ -81,7 +81,7 @@ static struct sh_timer_config tmu0_platform_data = {
|
|||
.name = "TMU0",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -112,7 +112,7 @@ static struct sh_timer_config tmu1_platform_data = {
|
|||
.name = "TMU1",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -143,7 +143,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
@ -173,7 +173,7 @@ static struct sh_timer_config tmu3_platform_data = {
|
|||
.name = "TMU3",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu3_resources[] = {
|
||||
|
@ -203,7 +203,7 @@ static struct sh_timer_config tmu4_platform_data = {
|
|||
.name = "TMU4",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu4_resources[] = {
|
||||
|
@ -233,7 +233,7 @@ static struct sh_timer_config tmu5_platform_data = {
|
|||
.name = "TMU5",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu5_resources[] = {
|
||||
|
@ -263,7 +263,7 @@ static struct sh_timer_config tmu6_platform_data = {
|
|||
.name = "TMU6",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu6_resources[] = {
|
||||
|
@ -293,7 +293,7 @@ static struct sh_timer_config tmu7_platform_data = {
|
|||
.name = "TMU7",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu7_resources[] = {
|
||||
|
@ -323,7 +323,7 @@ static struct sh_timer_config tmu8_platform_data = {
|
|||
.name = "TMU8",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu8_resources[] = {
|
||||
|
|
|
@ -18,7 +18,7 @@ static struct sh_timer_config tmu0_platform_data = {
|
|||
.name = "TMU0",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -49,7 +49,7 @@ static struct sh_timer_config tmu1_platform_data = {
|
|||
.name = "TMU1",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -80,7 +80,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
@ -110,7 +110,7 @@ static struct sh_timer_config tmu3_platform_data = {
|
|||
.name = "TMU3",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu3_resources[] = {
|
||||
|
@ -140,7 +140,7 @@ static struct sh_timer_config tmu4_platform_data = {
|
|||
.name = "TMU4",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu4_resources[] = {
|
||||
|
@ -170,7 +170,7 @@ static struct sh_timer_config tmu5_platform_data = {
|
|||
.name = "TMU5",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu5_resources[] = {
|
||||
|
|
|
@ -20,7 +20,7 @@ static struct sh_timer_config tmu0_platform_data = {
|
|||
.name = "TMU0",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -51,7 +51,7 @@ static struct sh_timer_config tmu1_platform_data = {
|
|||
.name = "TMU1",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -82,7 +82,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
@ -112,7 +112,7 @@ static struct sh_timer_config tmu3_platform_data = {
|
|||
.name = "TMU3",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu3_resources[] = {
|
||||
|
@ -142,7 +142,7 @@ static struct sh_timer_config tmu4_platform_data = {
|
|||
.name = "TMU4",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu4_resources[] = {
|
||||
|
@ -172,7 +172,7 @@ static struct sh_timer_config tmu5_platform_data = {
|
|||
.name = "TMU5",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu5_resources[] = {
|
||||
|
|
|
@ -75,7 +75,7 @@ static struct sh_timer_config tmu0_platform_data = {
|
|||
.name = "TMU0",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -106,7 +106,7 @@ static struct sh_timer_config tmu1_platform_data = {
|
|||
.name = "TMU1",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -137,7 +137,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
@ -167,7 +167,7 @@ static struct sh_timer_config tmu3_platform_data = {
|
|||
.name = "TMU3",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu3_resources[] = {
|
||||
|
@ -197,7 +197,7 @@ static struct sh_timer_config tmu4_platform_data = {
|
|||
.name = "TMU4",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu4_resources[] = {
|
||||
|
@ -227,7 +227,7 @@ static struct sh_timer_config tmu5_platform_data = {
|
|||
.name = "TMU5",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu5_resources[] = {
|
||||
|
@ -257,7 +257,7 @@ static struct sh_timer_config tmu6_platform_data = {
|
|||
.name = "TMU6",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu6_resources[] = {
|
||||
|
@ -287,7 +287,7 @@ static struct sh_timer_config tmu7_platform_data = {
|
|||
.name = "TMU7",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu7_resources[] = {
|
||||
|
@ -317,7 +317,7 @@ static struct sh_timer_config tmu8_platform_data = {
|
|||
.name = "TMU8",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu8_resources[] = {
|
||||
|
@ -347,7 +347,7 @@ static struct sh_timer_config tmu9_platform_data = {
|
|||
.name = "TMU9",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu9_resources[] = {
|
||||
|
@ -377,7 +377,7 @@ static struct sh_timer_config tmu10_platform_data = {
|
|||
.name = "TMU10",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu10_resources[] = {
|
||||
|
@ -407,7 +407,7 @@ static struct sh_timer_config tmu11_platform_data = {
|
|||
.name = "TMU11",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu11_resources[] = {
|
||||
|
|
|
@ -53,7 +53,7 @@ static struct sh_timer_config tmu0_platform_data = {
|
|||
.name = "TMU0",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -84,7 +84,7 @@ static struct sh_timer_config tmu1_platform_data = {
|
|||
.name = "TMU1",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -115,7 +115,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
@ -145,7 +145,7 @@ static struct sh_timer_config tmu3_platform_data = {
|
|||
.name = "TMU3",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu3_resources[] = {
|
||||
|
@ -175,7 +175,7 @@ static struct sh_timer_config tmu4_platform_data = {
|
|||
.name = "TMU4",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu4_resources[] = {
|
||||
|
@ -205,7 +205,7 @@ static struct sh_timer_config tmu5_platform_data = {
|
|||
.name = "TMU5",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu5_resources[] = {
|
||||
|
|
|
@ -75,7 +75,7 @@ static struct sh_timer_config tmu0_platform_data = {
|
|||
.name = "TMU0",
|
||||
.channel_offset = 0x04,
|
||||
.timer_bit = 0,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clockevent_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -106,7 +106,7 @@ static struct sh_timer_config tmu1_platform_data = {
|
|||
.name = "TMU1",
|
||||
.channel_offset = 0x10,
|
||||
.timer_bit = 1,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
.clocksource_rating = 200,
|
||||
};
|
||||
|
||||
|
@ -137,7 +137,7 @@ static struct sh_timer_config tmu2_platform_data = {
|
|||
.name = "TMU2",
|
||||
.channel_offset = 0x1c,
|
||||
.timer_bit = 2,
|
||||
.clk = "module_clk",
|
||||
.clk = "peripheral_clk",
|
||||
};
|
||||
|
||||
static struct resource tmu2_resources[] = {
|
||||
|
|
|
@ -396,7 +396,7 @@ static int __devinit calc_CCR(unsigned long scl_hz)
|
|||
signed char cdf, cdfm;
|
||||
int scgd, scgdm, scgds;
|
||||
|
||||
mclk = clk_get(NULL, "module_clk");
|
||||
mclk = clk_get(NULL, "peripheral_clk");
|
||||
if (IS_ERR(mclk)) {
|
||||
return PTR_ERR(mclk);
|
||||
} else {
|
||||
|
|
|
@ -1084,7 +1084,7 @@ static void __devinit sci_init_single(struct platform_device *dev,
|
|||
sci_port->port.uartclk = CONFIG_CPU_CLOCK;
|
||||
#elif defined(CONFIG_HAVE_CLK)
|
||||
sci_port->iclk = p->clk ? clk_get(&dev->dev, p->clk) : NULL;
|
||||
sci_port->dclk = clk_get(&dev->dev, "module_clk");
|
||||
sci_port->dclk = clk_get(&dev->dev, "peripheral_clk");
|
||||
sci_port->enable = sci_clk_enable;
|
||||
sci_port->disable = sci_clk_disable;
|
||||
#else
|
||||
|
|
|
@ -95,18 +95,18 @@ static void dac_audio_stop(void)
|
|||
outw(v, HD64461_GPADR);
|
||||
}
|
||||
|
||||
sh_dac_output(0, CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
|
||||
sh_dac_output(0, CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
|
||||
sh_dac_disable(CONFIG_SOUND_SH_DAC_AUDIO_CHANNEL);
|
||||
}
|
||||
|
||||
static void dac_audio_set_rate(void)
|
||||
{
|
||||
unsigned long interval;
|
||||
struct clk *clk;
|
||||
struct clk *clk;
|
||||
|
||||
clk = clk_get(NULL, "module_clk");
|
||||
interval = (clk_get_rate(clk) / 4) / rate;
|
||||
clk_put(clk);
|
||||
clk = clk_get(NULL, "peripheral_clk");
|
||||
interval = (clk_get_rate(clk) / 4) / rate;
|
||||
clk_put(clk);
|
||||
ctrl_outl(interval, TMU1_TCOR);
|
||||
ctrl_outl(interval, TMU1_TCNT);
|
||||
}
|
||||
|
|
Loading…
Reference in a new issue