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ARM: dts: vf610-zii-dev: Add QSPI node 

Both rev C and rev B of the board come with two QSPI-NOR chips
attached to the SoC. Add DT code describing all of this.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Chris Healy <cphealy@gmail.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
zero-colors
Andrey Smirnov 2019-05-22 00:20:52 -07:00 committed by Shawn Guo
parent 36b7ee5f7e
commit af79ef726a
1 changed files with 42 additions and 6 deletions
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48
arch/arm/boot/dts/vf610-zii-dev.dtsi
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@ -177,6 +177,36 @@
status = "okay";
};
&qspi0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi0>;
status = "okay";
/*
* Attached MT25QL02 can go up to 90Mhz in DTR and 166 in STR
* modes, so, spi-max-frequency is limited to 90MHz
*/
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <90000000>;
spi-rx-bus-width = <4>;
reg = <0>;
m25p,fast-read;
};
flash@2 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <90000000>;
spi-rx-bus-width = <4>;
reg = <2>;
m25p,fast-read;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart0>;
@ -360,12 +390,18 @@
pinctrl_qspi0: qspi0grp {
fsl,pins = <
VF610_PAD_PTD7__QSPI0_B_QSCK 0x31c3
VF610_PAD_PTD8__QSPI0_B_CS0 0x31ff
VF610_PAD_PTD9__QSPI0_B_DATA3 0x31c3
VF610_PAD_PTD10__QSPI0_B_DATA2 0x31c3
VF610_PAD_PTD11__QSPI0_B_DATA1 0x31c3
VF610_PAD_PTD12__QSPI0_B_DATA0 0x31c3
VF610_PAD_PTD0__QSPI0_A_QSCK 0x38c2
VF610_PAD_PTD1__QSPI0_A_CS0 0x38c2
VF610_PAD_PTD2__QSPI0_A_DATA3 0x38c3
VF610_PAD_PTD3__QSPI0_A_DATA2 0x38c3
VF610_PAD_PTD4__QSPI0_A_DATA1 0x38c3
VF610_PAD_PTD5__QSPI0_A_DATA0 0x38c3
VF610_PAD_PTD7__QSPI0_B_QSCK 0x38c2
VF610_PAD_PTD8__QSPI0_B_CS0 0x38c2
VF610_PAD_PTD9__QSPI0_B_DATA3 0x38c3
VF610_PAD_PTD10__QSPI0_B_DATA2 0x38c3
VF610_PAD_PTD11__QSPI0_B_DATA1 0x38c3
VF610_PAD_PTD12__QSPI0_B_DATA0 0x38c3
>;
};