skge: eeprom support
Add ability to read/write EEPROM Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -59,6 +59,9 @@
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#define BLINK_MS 250
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#define LINK_HZ HZ
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#define SKGE_EEPROM_MAGIC 0x9933aabb
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MODULE_DESCRIPTION("SysKonnect Gigabit Ethernet driver");
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MODULE_AUTHOR("Stephen Hemminger <shemminger@linux-foundation.org>");
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MODULE_LICENSE("GPL");
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@ -798,6 +801,98 @@ static int skge_phys_id(struct net_device *dev, u32 data)
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return 0;
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}
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static int skge_get_eeprom_len(struct net_device *dev)
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{
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struct skge_port *skge = netdev_priv(dev);
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u32 reg2;
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pci_read_config_dword(skge->hw->pdev, PCI_DEV_REG2, ®2);
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return 1 << ( ((reg2 & PCI_VPD_ROM_SZ) >> 14) + 8);
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}
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static u32 skge_vpd_read(struct pci_dev *pdev, int cap, u16 offset)
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{
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u32 val;
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pci_write_config_word(pdev, cap + PCI_VPD_ADDR, offset);
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do {
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pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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} while (!(offset & PCI_VPD_ADDR_F));
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pci_read_config_dword(pdev, cap + PCI_VPD_DATA, &val);
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return val;
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}
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static void skge_vpd_write(struct pci_dev *pdev, int cap, u16 offset, u32 val)
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{
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pci_write_config_dword(pdev, cap + PCI_VPD_DATA, val);
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pci_write_config_word(pdev, cap + PCI_VPD_ADDR,
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offset | PCI_VPD_ADDR_F);
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do {
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pci_read_config_word(pdev, cap + PCI_VPD_ADDR, &offset);
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} while (offset & PCI_VPD_ADDR_F);
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}
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static int skge_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
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u8 *data)
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{
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struct skge_port *skge = netdev_priv(dev);
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struct pci_dev *pdev = skge->hw->pdev;
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int cap = pci_find_capability(pdev, PCI_CAP_ID_VPD);
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int length = eeprom->len;
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u16 offset = eeprom->offset;
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if (!cap)
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return -EINVAL;
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eeprom->magic = SKGE_EEPROM_MAGIC;
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while (length > 0) {
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u32 val = skge_vpd_read(pdev, cap, offset);
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int n = min_t(int, length, sizeof(val));
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memcpy(data, &val, n);
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length -= n;
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data += n;
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offset += n;
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}
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return 0;
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}
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static int skge_set_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom,
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u8 *data)
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{
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struct skge_port *skge = netdev_priv(dev);
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struct pci_dev *pdev = skge->hw->pdev;
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int cap = pci_find_capability(pdev, PCI_CAP_ID_VPD);
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int length = eeprom->len;
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u16 offset = eeprom->offset;
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if (!cap)
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return -EINVAL;
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if (eeprom->magic != SKGE_EEPROM_MAGIC)
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return -EINVAL;
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while (length > 0) {
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u32 val;
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int n = min_t(int, length, sizeof(val));
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if (n < sizeof(val))
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val = skge_vpd_read(pdev, cap, offset);
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memcpy(&val, data, n);
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skge_vpd_write(pdev, cap, offset, val);
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length -= n;
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data += n;
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offset += n;
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}
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return 0;
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}
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static const struct ethtool_ops skge_ethtool_ops = {
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.get_settings = skge_get_settings,
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.set_settings = skge_set_settings,
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@ -810,6 +905,9 @@ static const struct ethtool_ops skge_ethtool_ops = {
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.set_msglevel = skge_set_msglevel,
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.nway_reset = skge_nway_reset,
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.get_link = ethtool_op_get_link,
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.get_eeprom_len = skge_get_eeprom_len,
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.get_eeprom = skge_get_eeprom,
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.set_eeprom = skge_set_eeprom,
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.get_ringparam = skge_get_ring_param,
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.set_ringparam = skge_set_ring_param,
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.get_pauseparam = skge_get_pauseparam,
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@ -1,5 +1,5 @@
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/*
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* Definitions for the new Marvell Yukon / SysKonenct driver.
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* Definitions for the new Marvell Yukon / SysKonnect driver.
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*/
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#ifndef _SKGE_H
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#define _SKGE_H
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@ -8,8 +8,10 @@
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#define PCI_DEV_REG1 0x40
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#define PCI_PHY_COMA 0x8000000
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#define PCI_VIO 0x2000000
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#define PCI_DEV_REG2 0x44
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#define PCI_REV_DESC 0x4
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#define PCI_VPD_ROM_SZ 7L<<14 /* VPD ROM size 0=256, 1=512, ... */
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#define PCI_REV_DESC 1<<2 /* Reverse Descriptor bytes */
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#define PCI_STATUS_ERROR_BITS (PCI_STATUS_DETECTED_PARITY | \
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PCI_STATUS_SIG_SYSTEM_ERROR | \
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