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MLK-17531-4: ARM64: dts: mx8mm-evk: enable AK4497 codec 

Enable AK4497 with mode 0. For ak4497 the same SAI interface as
for AK4458 is used, so a separate ak4497 dts is needed.

Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
pull/10/head
Viorel Suman 2018-05-21 13:30:49 +03:00 committed by Jason Liu
parent 566255d5a9
commit afb54cead3
2 changed files with 98 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm64/boot/dts/freescale/Makefile
View File

@ -77,8 +77,8 @@ dtb-$(CONFIG_ARCH_FSL_IMX8MQ) += fsl-imx8mq-ddr3l-arm2.dtb \
fsl-imx8mq-evk-ak4497.dtb \
fsl-imx8mq-evk-audio-tdm.dtb \
fsl-imx8mq-evk-drm.dtb
dtb-$(CONFIG_ARCH_FSL_IMX8MM) += fsl-imx8mm-evk.dtb
dtb-$(CONFIG_ARCH_FSL_IMX8MM) += fsl-imx8mm-evk.dtb \
fsl-imx8mm-evk-ak4497.dtb
always := $(dtb-y)
subdir-y := $(dts-dirs)
clean-files := *.dtb

96
arch/arm64/boot/dts/freescale/fsl-imx8mm-evk-ak4497.dts 100644
View File

@ -0,0 +1,96 @@
/*
* Copyright 2018 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "fsl-imx8mm-evk.dts"
/ {
sound-ak4458 {
status = "disabled";
};
sound-ak4497 {
status = "okay";
};
};
&iomuxc {
imx8mm-evk {
pinctrl_sai1_pcm: sai1grp_pcm {
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0xd6
MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 0xd6
MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0xd6
MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5 0xd6
MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6 0xd6
MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7 0xd6
>;
};
pinctrl_sai1_dsd: sai1grp_dsd {
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_MCLK 0xd6
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0xd6
MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 0xd6
MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0xd6
MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5 0xd6
MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6 0xd6
MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7 0xd6
>;
};
pinctrl_sai1_dsd512: sai1grp_dsd512 {
fsl,pins = <
MX8MM_IOMUXC_SAI1_MCLK_SAI1_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI1_TXFS_SAI1_TX_SYNC 0xd6
MX8MM_IOMUXC_SAI1_RXD7_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXC_SAI1_TX_BCLK 0xd6
MX8MM_IOMUXC_SAI1_TXD0_SAI1_TX_DATA0 0xd6
MX8MM_IOMUXC_SAI1_TXD1_SAI1_TX_DATA1 0xd6
MX8MM_IOMUXC_SAI1_TXD2_SAI1_TX_DATA2 0xd6
MX8MM_IOMUXC_SAI1_TXD3_SAI1_TX_DATA3 0xd6
MX8MM_IOMUXC_SAI1_TXD4_SAI1_TX_DATA4 0xd6
MX8MM_IOMUXC_SAI1_TXD5_SAI1_TX_DATA5 0xd6
MX8MM_IOMUXC_SAI1_TXD6_SAI1_TX_DATA6 0xd6
MX8MM_IOMUXC_SAI1_TXD7_SAI1_TX_DATA7 0xd6
>;
};
};
};
&sai1 {
pinctrl-names = "default", "dsd", "dsd512";
pinctrl-0 = <&pinctrl_sai1_pcm>;
pinctrl-1 = <&pinctrl_sai1_dsd>;
pinctrl-2 = <&pinctrl_sai1_dsd512>;
assigned-clocks = <&clk IMX8MM_CLK_SAI1_SRC>,
<&clk IMX8MM_CLK_SAI1_DIV>;
assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL2_OUT>;
assigned-clock-rates = <0>, <45158400>;
fsl,sai-multi-lane;
fsl,dataline,dsd = <0xff 0x11>;
dmas = <&sdma2 0 26 0>, <&sdma2 1 26 0>;
status = "okay";
};