dts/zero-sugar: drop imx7d-sdb container node from iomuxc
With recent kernel version, there is no need for a container node in iomuxc nodes. Let's drop them to save one level of indentation. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>pull/10/head
Shawn Guo
Steinar Bakkemo
parent
26882022c5
commit
afb86f6783
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@ -516,230 +516,225 @@
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};
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&iomuxc_lpsr {
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imx7d-sdb {
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pinctrl_wacom: wacomgrp {
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fsl,pins = <
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/*MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x00000074 /* WACOM RESET */
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MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x00000034 /* WACOM INT */
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MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x00000074 /* PDCTB */
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/*MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x00000014 /* FWE */
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/*MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x00000014 /* WACOM PWR ENABLE */
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>;
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};
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pinctrl_wacom: wacomgrp {
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fsl,pins = <
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/*MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x00000074 /* WACOM RESET */
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MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x00000034 /* WACOM INT */
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MX7D_PAD_LPSR_GPIO1_IO04__GPIO1_IO4 0x00000074 /* PDCTB */
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/*MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x00000014 /* FWE */
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/*MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x00000014 /* WACOM PWR ENABLE */
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>;
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};
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};
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&iomuxc {
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imx7d-sdb {
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pinctrl_touch: touchgrp {
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fsl,pins = <
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/* CYTTSP interrupt */
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MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x17000
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/* CYTTSP reset */
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MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x110b0
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>;
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};
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pinctrl_touch: touchgrp {
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fsl,pins = <
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/* CYTTSP interrupt */
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MX7D_PAD_GPIO1_IO14__GPIO1_IO14 0x17000
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/* CYTTSP reset */
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MX7D_PAD_GPIO1_IO13__GPIO1_IO13 0x110b0
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
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MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
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>;
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};
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pinctrl_i2c1: i2c1grp {
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fsl,pins = <
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MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f
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MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
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MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
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>;
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};
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pinctrl_i2c2: i2c2grp {
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fsl,pins = <
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MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f
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MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
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MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
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>;
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};
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pinctrl_i2c3: i2c3grp {
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fsl,pins = <
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MX7D_PAD_I2C3_SDA__I2C3_SDA 0x4000007f
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MX7D_PAD_I2C3_SCL__I2C3_SCL 0x4000007f
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
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MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
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>;
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};
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pinctrl_i2c4: i2c4grp {
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fsl,pins = <
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MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f
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MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f
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>;
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};
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pinctrl_lcdif: lcdifgrp {
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fsl,pins = <
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MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
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MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
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MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
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MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
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MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
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MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
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MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
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MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
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MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
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MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
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MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
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MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
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MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
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MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
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MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
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MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
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MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
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MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
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MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
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MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
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MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
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MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
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MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
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MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
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MX7D_PAD_LCD_CLK__LCD_CLK 0x79
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MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
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MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
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MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
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MX7D_PAD_LCD_RESET__LCD_RESET 0x79
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>;
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};
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pinctrl_lcdif: lcdifgrp {
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fsl,pins = <
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MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79
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MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79
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MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79
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MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79
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MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79
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MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79
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MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79
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MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79
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MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79
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MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79
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MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79
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MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79
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MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79
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MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79
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MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79
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MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79
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MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79
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MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79
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MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79
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MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79
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MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79
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MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79
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MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79
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MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79
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MX7D_PAD_LCD_CLK__LCD_CLK 0x79
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MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x79
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MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x79
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MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x79
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MX7D_PAD_LCD_RESET__LCD_RESET 0x79
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>;
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};
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pinctrl_max77818: max77818grp {
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fsl,pins = <
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MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 0x59
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>;
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};
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pinctrl_max77818: max77818grp {
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fsl,pins = <
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MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22 0x59
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x79
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MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x79
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>;
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};
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pinctrl_usbotg2_pwr_1: usbotg2-1 {
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fsl,pins = <
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MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
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>;
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};
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pinctrl_usbotg2_pwr_1: usbotg2-1 {
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fsl,pins = <
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MX7D_PAD_UART3_CTS_B__GPIO4_IO7 0x14
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x59
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MX7D_PAD_SD2_CLK__SD2_CLK 0x19
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
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>;
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};
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pinctrl_usdhc2: usdhc2grp {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x59
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MX7D_PAD_SD2_CLK__SD2_CLK 0x19
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
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>;
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};
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pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
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>;
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};
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pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
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MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
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MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
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MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
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MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
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MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x19
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
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>;
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};
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pinctrl_usdhc3: usdhc3grp {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x59
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MX7D_PAD_SD3_CLK__SD3_CLK 0x19
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
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>;
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};
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pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
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MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
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MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
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MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
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MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
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MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
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MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
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>;
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};
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pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
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fsl,pins = <
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MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
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MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
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MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
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MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
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MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
|
||||
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
|
||||
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
|
||||
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
|
||||
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
|
||||
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
|
||||
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wifi: wifigrp {
|
||||
fsl,pins = <
|
||||
/* WiFi Reg On */
|
||||
MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x00000014
|
||||
/* WiFi Host Wake */
|
||||
MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x00000014
|
||||
/* WiFi Sleep 32k */
|
||||
MX7D_PAD_SD1_WP__CCM_CLKO2 0x00000014
|
||||
>;
|
||||
};
|
||||
pinctrl_wifi: wifigrp {
|
||||
fsl,pins = <
|
||||
/* WiFi Reg On */
|
||||
MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x00000014
|
||||
/* WiFi Host Wake */
|
||||
MX7D_PAD_GPIO1_IO08__GPIO1_IO8 0x00000014
|
||||
/* WiFi Sleep 32k */
|
||||
MX7D_PAD_SD1_WP__CCM_CLKO2 0x00000014
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x74
|
||||
>;
|
||||
};
|
||||
pinctrl_wdog: wdoggrp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_ENET1_COL__WDOG1_WDOG_ANY 0x74
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_one_wire_gpio: one_wire_gpio_grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x00000074
|
||||
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x00000004
|
||||
>;
|
||||
};
|
||||
pinctrl_one_wire_gpio: one_wire_gpio_grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x00000074
|
||||
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x00000004
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_one_wire_uart6_tx: one_wire_uart6_tx_grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x00000004
|
||||
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x00000004
|
||||
>;
|
||||
};
|
||||
pinctrl_one_wire_uart6_tx: one_wire_uart6_tx_grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_DATA08__GPIO2_IO8 0x00000004
|
||||
MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x00000004
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_one_wire_uart6_rx: one_wire_uart6_rx_grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x00000004
|
||||
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x00000004
|
||||
>;
|
||||
};
|
||||
pinctrl_one_wire_uart6_rx: one_wire_uart6_rx_grp {
|
||||
fsl,pins = <
|
||||
MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x00000004
|
||||
MX7D_PAD_EPDC_DATA09__GPIO2_IO9 0x00000004
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in New Issue