PCI updates for v3.9:
ASPM Revert "PCI/ACPI: Request _OSC control before scanning PCI root bus" kexec PCI: Don't try to disable Bus Master on disconnected PCI devices Platform ROM images PCI: Add PCI ROM helper for platform-provided ROM images nouveau: Attempt to use platform-provided ROM image radeon: Attempt to use platform-provided ROM image Hotplug PCI/ACPI: Always resume devices on ACPI wakeup notifications PCI/PM: Disable runtime PM of PCIe ports EISA EISA/PCI: Fix bus res reference EISA/PCI: Init EISA early, before PNP -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJRXzmPAAoJEFmIoMA60/r8svoQAIb1Z11DAdPfTaXThwEIURZb KC4wzfLMAZCRvfY6j6qZw6Qi3NT6ZqgrZxSXgV0myB6Luwcv80+D2BHmDnRoxRYD ywAm2m8vwoUq5s7MsaGHRLViBafL5TDs1KQLVEPkJ+B1gCzo61UWXPVDu+z9u+Fx t9fNV5Xc/uaxciXZYVnPGTCFjCVTqa95x16bF6NgmG1j1DHYuX7fBVSsJc2CS77m P2oyrfLmsKUA7jKHD4ntbIslYcqUC5NF8wcRad324Pzi93IwdktUSn8tqqNFCX9T EE8hxCp24CPm6ngyCFIIkqYM/MMDM8YVqBwuZjngm3+tjaS3hBIrr1jBDenUgncY 2WRomgRzBwaa8nTr5xhin3kYGRkQAEf3M8RWG70YBppTidvvoUt0bfxSfSlN9R/t g/7Eu4u35+lJ9F+Gg4unc0JrydkSJG1tfE+0LaEOhqXgCwloPR3kk08qcHPA2NHQ dlEMJ3FSUHvINoRE7pm6+E2lcbGvZjCa9Cvd9IbdJ6r4wVYI7pHl8Zlp/sf3HZdV sKRAw7fSazoFCX73lHR0f1zx7l1OdTmDSxEHv/pQA+xVt7K0DcOq+Mj0B84pVYcl WSRUcr6jAi91syuKX+8TRpbfACb25PkPrEFEsjsGcBq+I/a15e8a+sIW31Z66PNu ICejTqh/2/aOlgFg9OBs =gIGr -----END PGP SIGNATURE----- Merge tag 'pci-v3.9-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "PCI updates for v3.9: ASPM Revert "PCI/ACPI: Request _OSC control before scanning PCI root bus" kexec PCI: Don't try to disable Bus Master on disconnected PCI devices Platform ROM images PCI: Add PCI ROM helper for platform-provided ROM images nouveau: Attempt to use platform-provided ROM image radeon: Attempt to use platform-provided ROM image Hotplug PCI/ACPI: Always resume devices on ACPI wakeup notifications PCI/PM: Disable runtime PM of PCIe ports EISA EISA/PCI: Fix bus res reference EISA/PCI: Init EISA early, before PNP" * tag 'pci-v3.9-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI/PM: Disable runtime PM of PCIe ports PCI/ACPI: Always resume devices on ACPI wakeup notifications PCI: Don't try to disable Bus Master on disconnected PCI devices Revert "PCI/ACPI: Request _OSC control before scanning PCI root bus" radeon: Attempt to use platform-provided ROM image nouveau: Attempt to use platform-provided ROM image EISA/PCI: Init EISA early, before PNP EISA/PCI: Fix bus res reference PCI: Add PCI ROM helper for platform-provided ROM images
This commit is contained in:
commit
b196553a7f
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@ -415,7 +415,6 @@ static int acpi_pci_root_add(struct acpi_device *device,
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struct acpi_pci_root *root;
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struct acpi_pci_driver *driver;
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u32 flags, base_flags;
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bool is_osc_granted = false;
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root = kzalloc(sizeof(struct acpi_pci_root), GFP_KERNEL);
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if (!root)
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@ -476,60 +475,6 @@ static int acpi_pci_root_add(struct acpi_device *device,
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flags = base_flags = OSC_PCI_SEGMENT_GROUPS_SUPPORT;
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acpi_pci_osc_support(root, flags);
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/* Indicate support for various _OSC capabilities. */
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if (pci_ext_cfg_avail())
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flags |= OSC_EXT_PCI_CONFIG_SUPPORT;
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if (pcie_aspm_support_enabled()) {
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flags |= OSC_ACTIVE_STATE_PWR_SUPPORT |
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OSC_CLOCK_PWR_CAPABILITY_SUPPORT;
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}
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if (pci_msi_enabled())
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flags |= OSC_MSI_SUPPORT;
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if (flags != base_flags) {
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status = acpi_pci_osc_support(root, flags);
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if (ACPI_FAILURE(status)) {
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dev_info(&device->dev, "ACPI _OSC support "
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"notification failed, disabling PCIe ASPM\n");
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pcie_no_aspm();
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flags = base_flags;
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}
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}
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if (!pcie_ports_disabled
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&& (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {
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flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
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| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
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| OSC_PCI_EXPRESS_PME_CONTROL;
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if (pci_aer_available()) {
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if (aer_acpi_firmware_first())
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dev_dbg(&device->dev,
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"PCIe errors handled by BIOS.\n");
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else
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flags |= OSC_PCI_EXPRESS_AER_CONTROL;
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}
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dev_info(&device->dev,
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"Requesting ACPI _OSC control (0x%02x)\n", flags);
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status = acpi_pci_osc_control_set(device->handle, &flags,
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OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
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if (ACPI_SUCCESS(status)) {
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is_osc_granted = true;
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dev_info(&device->dev,
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"ACPI _OSC control (0x%02x) granted\n", flags);
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} else {
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is_osc_granted = false;
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dev_info(&device->dev,
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"ACPI _OSC request failed (%s), "
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"returned control mask: 0x%02x\n",
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acpi_format_exception(status), flags);
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}
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} else {
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dev_info(&device->dev,
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"Unable to request _OSC control "
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"(_OSC support mask: 0x%02x)\n", flags);
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}
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/*
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* TBD: Need PCI interface for enumeration/configuration of roots.
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*/
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@ -554,15 +499,68 @@ static int acpi_pci_root_add(struct acpi_device *device,
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goto out_del_root;
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}
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/* ASPM setting */
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if (is_osc_granted) {
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if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM)
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/* Indicate support for various _OSC capabilities. */
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if (pci_ext_cfg_avail())
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flags |= OSC_EXT_PCI_CONFIG_SUPPORT;
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if (pcie_aspm_support_enabled()) {
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flags |= OSC_ACTIVE_STATE_PWR_SUPPORT |
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OSC_CLOCK_PWR_CAPABILITY_SUPPORT;
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}
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if (pci_msi_enabled())
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flags |= OSC_MSI_SUPPORT;
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if (flags != base_flags) {
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status = acpi_pci_osc_support(root, flags);
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if (ACPI_FAILURE(status)) {
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dev_info(&device->dev, "ACPI _OSC support "
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"notification failed, disabling PCIe ASPM\n");
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pcie_no_aspm();
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flags = base_flags;
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}
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}
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if (!pcie_ports_disabled
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&& (flags & ACPI_PCIE_REQ_SUPPORT) == ACPI_PCIE_REQ_SUPPORT) {
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flags = OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL
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| OSC_PCI_EXPRESS_NATIVE_HP_CONTROL
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| OSC_PCI_EXPRESS_PME_CONTROL;
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if (pci_aer_available()) {
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if (aer_acpi_firmware_first())
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dev_dbg(&device->dev,
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"PCIe errors handled by BIOS.\n");
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else
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flags |= OSC_PCI_EXPRESS_AER_CONTROL;
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}
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dev_info(&device->dev,
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"Requesting ACPI _OSC control (0x%02x)\n", flags);
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status = acpi_pci_osc_control_set(device->handle, &flags,
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OSC_PCI_EXPRESS_CAP_STRUCTURE_CONTROL);
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if (ACPI_SUCCESS(status)) {
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dev_info(&device->dev,
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"ACPI _OSC control (0x%02x) granted\n", flags);
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if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
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/*
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* We have ASPM control, but the FADT indicates
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* that it's unsupported. Clear it.
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*/
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pcie_clear_aspm(root->bus);
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}
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} else {
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dev_info(&device->dev,
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"ACPI _OSC request failed (%s), "
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"returned control mask: 0x%02x\n",
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acpi_format_exception(status), flags);
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pr_info("ACPI _OSC control for PCIe not granted, "
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"disabling ASPM\n");
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pcie_no_aspm();
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}
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} else {
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dev_info(&device->dev,
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"Unable to request _OSC control "
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"(_OSC support mask: 0x%02x)\n", flags);
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}
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pci_acpi_add_bus_pm_notifier(device, root->bus);
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if (device->wakeup.flags.run_wake)
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@ -19,10 +19,10 @@
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/* There is only *one* pci_eisa device per machine, right ? */
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static struct eisa_root_device pci_eisa_root;
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static int __init pci_eisa_init(struct pci_dev *pdev,
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const struct pci_device_id *ent)
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static int __init pci_eisa_init(struct pci_dev *pdev)
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{
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int rc;
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int rc, i;
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struct resource *res, *bus_res = NULL;
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if ((rc = pci_enable_device (pdev))) {
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printk (KERN_ERR "pci_eisa : Could not enable device %s\n",
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@ -30,9 +30,30 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
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return rc;
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}
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/*
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* The Intel 82375 PCI-EISA bridge is a subtractive-decode PCI
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* device, so the resources available on EISA are the same as those
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* available on the 82375 bus. This works the same as a PCI-PCI
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* bridge in subtractive-decode mode (see pci_read_bridge_bases()).
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* We assume other PCI-EISA bridges are similar.
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*
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* eisa_root_register() can only deal with a single io port resource,
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* so we use the first valid io port resource.
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*/
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pci_bus_for_each_resource(pdev->bus, res, i)
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if (res && (res->flags & IORESOURCE_IO)) {
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bus_res = res;
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break;
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}
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if (!bus_res) {
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dev_err(&pdev->dev, "No resources available\n");
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return -1;
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}
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pci_eisa_root.dev = &pdev->dev;
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pci_eisa_root.res = pdev->bus->resource[0];
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pci_eisa_root.bus_base_addr = pdev->bus->resource[0]->start;
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pci_eisa_root.res = bus_res;
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pci_eisa_root.bus_base_addr = bus_res->start;
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pci_eisa_root.slots = EISA_MAX_SLOTS;
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pci_eisa_root.dma_mask = pdev->dma_mask;
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dev_set_drvdata(pci_eisa_root.dev, &pci_eisa_root);
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@ -45,22 +66,26 @@ static int __init pci_eisa_init(struct pci_dev *pdev,
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return 0;
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}
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static struct pci_device_id pci_eisa_pci_tbl[] = {
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{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
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PCI_CLASS_BRIDGE_EISA << 8, 0xffff00, 0 },
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{ 0, }
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};
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static struct pci_driver __refdata pci_eisa_driver = {
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.name = "pci_eisa",
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.id_table = pci_eisa_pci_tbl,
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.probe = pci_eisa_init,
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};
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static int __init pci_eisa_init_module (void)
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/*
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* We have to call pci_eisa_init_early() before pnpacpi_init()/isapnp_init().
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* Otherwise pnp resource will get enabled early and could prevent eisa
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* to be initialized.
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* Also need to make sure pci_eisa_init_early() is called after
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* x86/pci_subsys_init().
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* So need to use subsys_initcall_sync with it.
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*/
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static int __init pci_eisa_init_early(void)
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{
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return pci_register_driver (&pci_eisa_driver);
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struct pci_dev *dev = NULL;
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int ret;
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for_each_pci_dev(dev)
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if ((dev->class >> 8) == PCI_CLASS_BRIDGE_EISA) {
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ret = pci_eisa_init(dev);
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if (ret)
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return ret;
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}
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device_initcall(pci_eisa_init_module);
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MODULE_DEVICE_TABLE(pci, pci_eisa_pci_tbl);
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return 0;
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}
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subsys_initcall_sync(pci_eisa_init_early);
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|
|
|
@ -248,6 +248,22 @@ nouveau_bios_shadow_pci(struct nouveau_bios *bios)
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}
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}
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|
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static void
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nouveau_bios_shadow_platform(struct nouveau_bios *bios)
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{
|
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struct pci_dev *pdev = nv_device(bios)->pdev;
|
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size_t size;
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|
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void __iomem *rom = pci_platform_rom(pdev, &size);
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if (rom && size) {
|
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bios->data = kmalloc(size, GFP_KERNEL);
|
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if (bios->data) {
|
||||
memcpy_fromio(bios->data, rom, size);
|
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bios->size = size;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int
|
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nouveau_bios_score(struct nouveau_bios *bios, const bool writeable)
|
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{
|
||||
|
@ -288,6 +304,7 @@ nouveau_bios_shadow(struct nouveau_bios *bios)
|
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{ "PROM", nouveau_bios_shadow_prom, false, 0, 0, NULL },
|
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{ "ACPI", nouveau_bios_shadow_acpi, true, 0, 0, NULL },
|
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{ "PCIROM", nouveau_bios_shadow_pci, true, 0, 0, NULL },
|
||||
{ "PLATFORM", nouveau_bios_shadow_platform, true, 0, 0, NULL },
|
||||
{}
|
||||
};
|
||||
struct methods *mthd, *best;
|
||||
|
|
|
@ -99,6 +99,29 @@ static bool radeon_read_bios(struct radeon_device *rdev)
|
|||
return true;
|
||||
}
|
||||
|
||||
static bool radeon_read_platform_bios(struct radeon_device *rdev)
|
||||
{
|
||||
uint8_t __iomem *bios;
|
||||
size_t size;
|
||||
|
||||
rdev->bios = NULL;
|
||||
|
||||
bios = pci_platform_rom(rdev->pdev, &size);
|
||||
if (!bios) {
|
||||
return false;
|
||||
}
|
||||
|
||||
if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
|
||||
return false;
|
||||
}
|
||||
rdev->bios = kmemdup(bios, size, GFP_KERNEL);
|
||||
if (rdev->bios == NULL) {
|
||||
return false;
|
||||
}
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ACPI
|
||||
/* ATRM is used to get the BIOS on the discrete cards in
|
||||
* dual-gpu systems.
|
||||
|
@ -620,6 +643,9 @@ bool radeon_get_bios(struct radeon_device *rdev)
|
|||
if (r == false) {
|
||||
r = radeon_read_disabled_bios(rdev);
|
||||
}
|
||||
if (r == false) {
|
||||
r = radeon_read_platform_bios(rdev);
|
||||
}
|
||||
if (r == false || rdev->bios == NULL) {
|
||||
DRM_ERROR("Unable to locate a BIOS ROM\n");
|
||||
rdev->bios = NULL;
|
||||
|
|
|
@ -53,14 +53,15 @@ static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context)
|
|||
return;
|
||||
}
|
||||
|
||||
if (!pci_dev->pm_cap || !pci_dev->pme_support
|
||||
|| pci_check_pme_status(pci_dev)) {
|
||||
/* Clear PME Status if set. */
|
||||
if (pci_dev->pme_support)
|
||||
pci_check_pme_status(pci_dev);
|
||||
|
||||
if (pci_dev->pme_poll)
|
||||
pci_dev->pme_poll = false;
|
||||
|
||||
pci_wakeup_event(pci_dev);
|
||||
pm_runtime_resume(&pci_dev->dev);
|
||||
}
|
||||
|
||||
if (pci_dev->subordinate)
|
||||
pci_pme_wakeup_bus(pci_dev->subordinate);
|
||||
|
|
|
@ -390,8 +390,9 @@ static void pci_device_shutdown(struct device *dev)
|
|||
|
||||
/*
|
||||
* Turn off Bus Master bit on the device to tell it to not
|
||||
* continue to do DMA
|
||||
* continue to do DMA. Don't touch devices in D3cold or unknown states.
|
||||
*/
|
||||
if (pci_dev->current_state <= PCI_D3hot)
|
||||
pci_clear_master(pci_dev);
|
||||
}
|
||||
|
||||
|
|
|
@ -184,14 +184,6 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
|
|||
#define PCIE_PORTDRV_PM_OPS NULL
|
||||
#endif /* !PM */
|
||||
|
||||
/*
|
||||
* PCIe port runtime suspend is broken for some chipsets, so use a
|
||||
* black list to disable runtime PM for these chipsets.
|
||||
*/
|
||||
static const struct pci_device_id port_runtime_pm_black_list[] = {
|
||||
{ /* end: all zeroes */ }
|
||||
};
|
||||
|
||||
/*
|
||||
* pcie_portdrv_probe - Probe PCI-Express port devices
|
||||
* @dev: PCI-Express port device being probed
|
||||
|
@ -225,16 +217,11 @@ static int pcie_portdrv_probe(struct pci_dev *dev,
|
|||
* it by default.
|
||||
*/
|
||||
dev->d3cold_allowed = false;
|
||||
if (!pci_match_id(port_runtime_pm_black_list, dev))
|
||||
pm_runtime_put_noidle(&dev->dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pcie_portdrv_remove(struct pci_dev *dev)
|
||||
{
|
||||
if (!pci_match_id(port_runtime_pm_black_list, dev))
|
||||
pm_runtime_get_noresume(&dev->dev);
|
||||
pcie_port_device_remove(dev);
|
||||
pci_disable_device(dev);
|
||||
}
|
||||
|
|
|
@ -100,27 +100,6 @@ size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size)
|
|||
return min((size_t)(image - rom), size);
|
||||
}
|
||||
|
||||
static loff_t pci_find_rom(struct pci_dev *pdev, size_t *size)
|
||||
{
|
||||
struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
|
||||
loff_t start;
|
||||
|
||||
/* assign the ROM an address if it doesn't have one */
|
||||
if (res->parent == NULL && pci_assign_resource(pdev, PCI_ROM_RESOURCE))
|
||||
return 0;
|
||||
start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
|
||||
*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
|
||||
|
||||
if (*size == 0)
|
||||
return 0;
|
||||
|
||||
/* Enable ROM space decodes */
|
||||
if (pci_enable_rom(pdev))
|
||||
return 0;
|
||||
|
||||
return start;
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_map_rom - map a PCI ROM to kernel space
|
||||
* @pdev: pointer to pci device struct
|
||||
|
@ -135,7 +114,7 @@ static loff_t pci_find_rom(struct pci_dev *pdev, size_t *size)
|
|||
void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
|
||||
{
|
||||
struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
|
||||
loff_t start = 0;
|
||||
loff_t start;
|
||||
void __iomem *rom;
|
||||
|
||||
/*
|
||||
|
@ -154,20 +133,20 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
|
|||
return (void __iomem *)(unsigned long)
|
||||
pci_resource_start(pdev, PCI_ROM_RESOURCE);
|
||||
} else {
|
||||
start = pci_find_rom(pdev, size);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Some devices may provide ROMs via a source other than the BAR
|
||||
*/
|
||||
if (!start && pdev->rom && pdev->romlen) {
|
||||
*size = pdev->romlen;
|
||||
return phys_to_virt(pdev->rom);
|
||||
}
|
||||
|
||||
if (!start)
|
||||
/* assign the ROM an address if it doesn't have one */
|
||||
if (res->parent == NULL &&
|
||||
pci_assign_resource(pdev,PCI_ROM_RESOURCE))
|
||||
return NULL;
|
||||
start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
|
||||
*size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
|
||||
if (*size == 0)
|
||||
return NULL;
|
||||
|
||||
/* Enable ROM space decodes */
|
||||
if (pci_enable_rom(pdev))
|
||||
return NULL;
|
||||
}
|
||||
}
|
||||
|
||||
rom = ioremap(start, *size);
|
||||
if (!rom) {
|
||||
|
@ -202,7 +181,6 @@ void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
|
|||
if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
|
||||
return;
|
||||
|
||||
if (!pdev->rom || !pdev->romlen)
|
||||
iounmap(rom);
|
||||
|
||||
/* Disable again before continuing, leave enabled if pci=rom */
|
||||
|
@ -227,7 +205,24 @@ void pci_cleanup_rom(struct pci_dev *pdev)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* pci_platform_rom - provides a pointer to any ROM image provided by the
|
||||
* platform
|
||||
* @pdev: pointer to pci device struct
|
||||
* @size: pointer to receive size of pci window over ROM
|
||||
*/
|
||||
void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
|
||||
{
|
||||
if (pdev->rom && pdev->romlen) {
|
||||
*size = pdev->romlen;
|
||||
return phys_to_virt((phys_addr_t)pdev->rom);
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(pci_map_rom);
|
||||
EXPORT_SYMBOL(pci_unmap_rom);
|
||||
EXPORT_SYMBOL_GPL(pci_enable_rom);
|
||||
EXPORT_SYMBOL_GPL(pci_disable_rom);
|
||||
EXPORT_SYMBOL(pci_platform_rom);
|
||||
|
|
|
@ -916,6 +916,7 @@ void pci_disable_rom(struct pci_dev *pdev);
|
|||
void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size);
|
||||
void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom);
|
||||
size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size);
|
||||
void __iomem __must_check *pci_platform_rom(struct pci_dev *pdev, size_t *size);
|
||||
|
||||
/* Power management related routines */
|
||||
int pci_save_state(struct pci_dev *dev);
|
||||
|
|
Loading…
Reference in a new issue