[PATCH] ia64 sn __iomem annotations
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
parent
d3a880e1ff
commit
b3e5b5b227
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@ -25,7 +25,7 @@ union br_ptr {
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*/
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*/
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void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
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void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -38,14 +38,14 @@ void pcireg_control_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
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default:
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default:
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panic
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panic
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("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p",
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("pcireg_control_bit_clr: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -58,7 +58,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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default:
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default:
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panic
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panic
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("pcireg_control_bit_set: unknown bridgetype bridge 0x%p",
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("pcireg_control_bit_set: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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@ -68,7 +68,7 @@ void pcireg_control_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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*/
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*/
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uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
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uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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uint64_t ret = 0;
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uint64_t ret = 0;
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if (pcibus_info) {
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if (pcibus_info) {
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@ -82,7 +82,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
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default:
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default:
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panic
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panic
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("pcireg_tflush_get: unknown bridgetype bridge 0x%p",
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("pcireg_tflush_get: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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@ -98,7 +98,7 @@ uint64_t pcireg_tflush_get(struct pcibus_info *pcibus_info)
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*/
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*/
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uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
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uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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uint64_t ret = 0;
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uint64_t ret = 0;
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if (pcibus_info) {
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if (pcibus_info) {
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@ -112,7 +112,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
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default:
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default:
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panic
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panic
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("pcireg_intr_status_get: unknown bridgetype bridge 0x%p",
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("pcireg_intr_status_get: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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return ret;
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return ret;
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@ -123,7 +123,7 @@ uint64_t pcireg_intr_status_get(struct pcibus_info * pcibus_info)
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*/
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*/
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void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
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void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -136,14 +136,14 @@ void pcireg_intr_enable_bit_clr(struct pcibus_info *pcibus_info, uint64_t bits)
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default:
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default:
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panic
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panic
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("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p",
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("pcireg_intr_enable_bit_clr: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -156,7 +156,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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default:
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default:
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panic
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panic
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("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p",
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("pcireg_intr_enable_bit_set: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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@ -167,7 +167,7 @@ void pcireg_intr_enable_bit_set(struct pcibus_info *pcibus_info, uint64_t bits)
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void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
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void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
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uint64_t addr)
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uint64_t addr)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -186,7 +186,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
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default:
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default:
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panic
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panic
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("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p",
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("pcireg_intr_addr_addr_get: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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@ -196,7 +196,7 @@ void pcireg_intr_addr_addr_set(struct pcibus_info *pcibus_info, int int_n,
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*/
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*/
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void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
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void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -209,7 +209,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
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default:
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default:
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panic
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panic
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("pcireg_force_intr_set: unknown bridgetype bridge 0x%p",
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("pcireg_force_intr_set: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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@ -219,7 +219,7 @@ void pcireg_force_intr_set(struct pcibus_info *pcibus_info, int int_n)
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*/
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*/
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uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
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uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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uint64_t ret = 0;
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uint64_t ret = 0;
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if (pcibus_info) {
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if (pcibus_info) {
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@ -233,7 +233,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
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__sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
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__sn_readq_relaxed(&ptr->pic.p_wr_req_buf[device]);
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break;
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break;
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default:
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default:
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panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", (void *)ptr);
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panic("pcireg_wrb_flush_get: unknown bridgetype bridge 0x%p", ptr);
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}
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}
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}
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}
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@ -244,7 +244,7 @@ uint64_t pcireg_wrb_flush_get(struct pcibus_info *pcibus_info, int device)
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void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
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void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
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uint64_t val)
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uint64_t val)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -257,15 +257,15 @@ void pcireg_int_ate_set(struct pcibus_info *pcibus_info, int ate_index,
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default:
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default:
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panic
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panic
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("pcireg_int_ate_set: unknown bridgetype bridge 0x%p",
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("pcireg_int_ate_set: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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}
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}
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uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
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uint64_t __iomem *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
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{
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{
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union br_ptr *ptr = (union br_ptr *)pcibus_info->pbi_buscommon.bs_base;
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union br_ptr __iomem *ptr = (union br_ptr __iomem *)pcibus_info->pbi_buscommon.bs_base;
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uint64_t *ret = (uint64_t *) 0;
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uint64_t __iomem *ret = NULL;
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if (pcibus_info) {
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if (pcibus_info) {
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switch (pcibus_info->pbi_bridge_type) {
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switch (pcibus_info->pbi_bridge_type) {
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@ -278,7 +278,7 @@ uint64_t *pcireg_int_ate_addr(struct pcibus_info *pcibus_info, int ate_index)
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default:
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default:
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panic
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panic
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("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p",
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("pcireg_int_ate_addr: unknown bridgetype bridge 0x%p",
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(void *)ptr);
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ptr);
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}
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}
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}
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}
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return ret;
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return ret;
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@ -38,10 +38,10 @@ tioca_gart_init(struct tioca_kernel *tioca_kern)
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uint64_t offset;
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uint64_t offset;
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struct page *tmp;
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struct page *tmp;
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struct tioca_common *tioca_common;
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struct tioca_common *tioca_common;
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struct tioca *ca_base;
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struct tioca __iomem *ca_base;
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tioca_common = tioca_kern->ca_common;
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tioca_common = tioca_kern->ca_common;
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ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
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ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
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if (list_empty(tioca_kern->ca_devices))
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if (list_empty(tioca_kern->ca_devices))
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return 0;
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return 0;
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@ -215,7 +215,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
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{
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{
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int cap_ptr;
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int cap_ptr;
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uint32_t reg;
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uint32_t reg;
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struct tioca *tioca_base;
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struct tioca __iomem *tioca_base;
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struct pci_dev *pdev;
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struct pci_dev *pdev;
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struct tioca_common *common;
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struct tioca_common *common;
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@ -257,7 +257,7 @@ tioca_fastwrite_enable(struct tioca_kernel *tioca_kern)
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* Set ca's fw to match
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* Set ca's fw to match
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*/
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*/
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tioca_base = (struct tioca *)common->ca_common.bs_base;
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tioca_base = (struct tioca __iomem*)common->ca_common.bs_base;
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__sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
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__sn_setq_relaxed(&tioca_base->ca_control1, CA_AGP_FW_ENABLE);
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}
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}
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@ -322,7 +322,7 @@ static uint64_t
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tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
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tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
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{
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{
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struct tioca_common *tioca_common;
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struct tioca_common *tioca_common;
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struct tioca *ca_base;
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struct tioca __iomem *ca_base;
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uint64_t ct_addr;
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uint64_t ct_addr;
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dma_addr_t bus_addr;
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dma_addr_t bus_addr;
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uint32_t node_upper;
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uint32_t node_upper;
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@ -330,7 +330,7 @@ tioca_dma_d48(struct pci_dev *pdev, uint64_t paddr)
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struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
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struct pcidev_info *pcidev_info = SN_PCIDEV_INFO(pdev);
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tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
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tioca_common = (struct tioca_common *)pcidev_info->pdi_pcibus_info;
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ca_base = (struct tioca *)tioca_common->ca_common.bs_base;
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ca_base = (struct tioca __iomem *)tioca_common->ca_common.bs_base;
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ct_addr = PHYS_TO_TIODMA(paddr);
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ct_addr = PHYS_TO_TIODMA(paddr);
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if (!ct_addr)
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if (!ct_addr)
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