ASoC: rockchip: i2s: share tx/rx lrck when symmetric_rates enabled
share lrck_tx to lrck_rx when symmetric_rates enabled. Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -226,6 +226,7 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct rk_i2s_dev *i2s = to_info(dai);
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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unsigned int val = 0;
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switch (params_format(params)) {
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@ -278,6 +279,13 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
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I2S_DMACR_RDL(16));
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val = I2S_CKR_TRCM_TXRX;
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if (dai->driver->symmetric_rates || rtd->dai_link->symmetric_rates)
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val = I2S_CKR_TRCM_TXSHARE;
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regmap_update_bits(i2s->regmap, I2S_CKR,
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I2S_CKR_TRCM_MASK,
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val);
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return 0;
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}
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@ -78,6 +78,12 @@
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* CKR
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* clock generation register
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*/
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#define I2S_CKR_TRCM_SHIFT 28
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#define I2S_CKR_TRCM(x) (x << I2S_CKR_TRCM_SHIFT)
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#define I2S_CKR_TRCM_TXRX (0 << I2S_CKR_TRCM_SHIFT)
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#define I2S_CKR_TRCM_TXSHARE (1 << I2S_CKR_TRCM_SHIFT)
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#define I2S_CKR_TRCM_RXSHARE (2 << I2S_CKR_TRCM_SHIFT)
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#define I2S_CKR_TRCM_MASK (3 << I2S_CKR_TRCM_SHIFT)
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#define I2S_CKR_MSS_SHIFT 27
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#define I2S_CKR_MSS_MASTER (0 << I2S_CKR_MSS_SHIFT)
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#define I2S_CKR_MSS_SLAVE (1 << I2S_CKR_MSS_SHIFT)
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