[PATCH] sundance: fix DFE-580TX Tx Underrun
Under heavy PCI bus load, ports of the DFE-580TX 4-ethernet port board stop working, with currently no other cure than a powercycle. Here is a tested fix. By the way, I also fixed some references and attribution. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Jeff Garzik <jgarzik@pobox.com>
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@ -80,7 +80,7 @@
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I/O access could affect performance in ARM-based system
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I/O access could affect performance in ARM-based system
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- Add Linux software VLAN support
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- Add Linux software VLAN support
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Version LK1.08 (D-Link):
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Version LK1.08 (Philippe De Muyter phdm@macqel.be):
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- Fix bug of custom mac address
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- Fix bug of custom mac address
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(StationAddr register only accept word write)
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(StationAddr register only accept word write)
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@ -91,11 +91,14 @@
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Version LK1.09a (ICPlus):
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Version LK1.09a (ICPlus):
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- Add the delay time in reading the contents of EEPROM
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- Add the delay time in reading the contents of EEPROM
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Version LK1.10 (Philippe De Muyter phdm@macqel.be):
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- Make 'unblock interface after Tx underrun' work
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*/
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*/
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#define DRV_NAME "sundance"
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#define DRV_NAME "sundance"
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#define DRV_VERSION "1.01+LK1.09a"
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#define DRV_VERSION "1.01+LK1.10"
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#define DRV_RELDATE "10-Jul-2003"
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#define DRV_RELDATE "28-Oct-2005"
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/* The user-configurable values.
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/* The user-configurable values.
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@ -263,8 +266,10 @@ IV. Notes
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IVb. References
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IVb. References
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The Sundance ST201 datasheet, preliminary version.
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The Sundance ST201 datasheet, preliminary version.
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http://cesdis.gsfc.nasa.gov/linux/misc/100mbps.html
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The Kendin KS8723 datasheet, preliminary version.
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http://cesdis.gsfc.nasa.gov/linux/misc/NWay.html
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The ICplus IP100 datasheet, preliminary version.
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http://www.scyld.com/expert/100mbps.html
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http://www.scyld.com/expert/NWay.html
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IVc. Errata
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IVc. Errata
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@ -500,6 +505,25 @@ static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
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static int netdev_close(struct net_device *dev);
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static int netdev_close(struct net_device *dev);
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static struct ethtool_ops ethtool_ops;
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static struct ethtool_ops ethtool_ops;
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static void sundance_reset(struct net_device *dev, unsigned long reset_cmd)
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{
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struct netdev_private *np = netdev_priv(dev);
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void __iomem *ioaddr = np->base + ASICCtrl;
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int countdown;
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/* ST201 documentation states ASICCtrl is a 32bit register */
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iowrite32 (reset_cmd | ioread32 (ioaddr), ioaddr);
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/* ST201 documentation states reset can take up to 1 ms */
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countdown = 10 + 1;
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while (ioread32 (ioaddr) & (ResetBusy << 16)) {
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if (--countdown == 0) {
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printk(KERN_WARNING "%s : reset not completed !!\n", dev->name);
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break;
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}
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udelay(100);
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}
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}
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static int __devinit sundance_probe1 (struct pci_dev *pdev,
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static int __devinit sundance_probe1 (struct pci_dev *pdev,
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const struct pci_device_id *ent)
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const struct pci_device_id *ent)
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{
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{
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@ -1190,23 +1214,33 @@ static irqreturn_t intr_handler(int irq, void *dev_instance, struct pt_regs *rgs
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("%s: Transmit status is %2.2x.\n",
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("%s: Transmit status is %2.2x.\n",
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dev->name, tx_status);
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dev->name, tx_status);
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if (tx_status & 0x1e) {
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if (tx_status & 0x1e) {
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if (netif_msg_tx_err(np))
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printk("%s: Transmit error status %4.4x.\n",
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dev->name, tx_status);
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np->stats.tx_errors++;
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np->stats.tx_errors++;
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if (tx_status & 0x10)
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if (tx_status & 0x10)
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np->stats.tx_fifo_errors++;
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np->stats.tx_fifo_errors++;
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if (tx_status & 0x08)
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if (tx_status & 0x08)
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np->stats.collisions++;
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np->stats.collisions++;
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if (tx_status & 0x04)
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np->stats.tx_fifo_errors++;
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if (tx_status & 0x02)
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if (tx_status & 0x02)
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np->stats.tx_window_errors++;
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np->stats.tx_window_errors++;
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/* This reset has not been verified!. */
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/*
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if (tx_status & 0x10) { /* Reset the Tx. */
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** This reset has been verified on
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np->stats.tx_fifo_errors++;
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** DFE-580TX boards ! phdm@macqel.be.
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spin_lock(&np->lock);
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*/
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reset_tx(dev);
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if (tx_status & 0x10) { /* TxUnderrun */
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spin_unlock(&np->lock);
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unsigned short txthreshold;
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txthreshold = ioread16 (ioaddr + TxStartThresh);
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/* Restart Tx FIFO and transmitter */
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sundance_reset(dev, (NetworkReset|FIFOReset|TxReset) << 16);
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iowrite16 (txthreshold, ioaddr + TxStartThresh);
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/* No need to reset the Tx pointer here */
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}
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}
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if (tx_status & 0x1e) /* Restart the Tx. */
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/* Restart the Tx. */
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iowrite16 (TxEnable,
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iowrite16 (TxEnable, ioaddr + MACCtrl1);
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ioaddr + MACCtrl1);
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}
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}
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/* Yup, this is a documentation bug. It cost me *hours*. */
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/* Yup, this is a documentation bug. It cost me *hours*. */
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iowrite16 (0, ioaddr + TxStatus);
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iowrite16 (0, ioaddr + TxStatus);
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