redonkable
/
remarkable-linux
1
0
Fork 0
Code Releases Activity

drm/gf100-/gr: fetch tpcs-per-ppc info on startup 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
wifi-calibration
Ben Skeggs 2014-08-10 04:10:29 +10:00
parent f331a15f84
commit b81146b03b
9 changed files with 16 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
drivers/gpu/drm/nouveau/core/engine/graph/gk110b.c
View File

@ -113,4 +113,5 @@ gk110b_graph_oclass = &(struct nvc0_graph_oclass) {
.mmio = gk110b_graph_pack_mmio,
.fecs.ucode = &nvf0_graph_fecs_ucode,
.gpccs.ucode = &nvf0_graph_gpccs_ucode,
.ppc_nr = 2,
}.base;

1
drivers/gpu/drm/nouveau/core/engine/graph/gk20a.c
View File

@ -44,4 +44,5 @@ gk20a_graph_oclass = &(struct nvc0_graph_oclass) {
.cclass = &gk20a_grctx_oclass,
.sclass = gk20a_graph_sclass,
.mmio = nve4_graph_pack_mmio,
.ppc_nr = 1,
}.base;

1
drivers/gpu/drm/nouveau/core/engine/graph/gm107.c
View File

@ -465,4 +465,5 @@ gm107_graph_oclass = &(struct nvc0_graph_oclass) {
.mmio = gm107_graph_pack_mmio,
.fecs.ucode = 0 ? &gm107_graph_fecs_ucode : NULL,
.gpccs.ucode = &gm107_graph_gpccs_ucode,
.ppc_nr = 2,
}.base;

1
drivers/gpu/drm/nouveau/core/engine/graph/nv108.c
View File

@ -220,4 +220,5 @@ nv108_graph_oclass = &(struct nvc0_graph_oclass) {
.mmio = nv108_graph_pack_mmio,
.fecs.ucode = &nv108_graph_fecs_ucode,
.gpccs.ucode = &nv108_graph_gpccs_ucode,
.ppc_nr = 1,
}.base;

7
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.c
View File

@ -1503,7 +1503,7 @@ nvc0_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
struct nouveau_device *device = nv_device(parent);
struct nvc0_graph_priv *priv;
bool use_ext_fw, enable;
int ret, i;
int ret, i, j;
use_ext_fw = nouveau_boolopt(device->cfgopt, "NvGrUseFW",
oclass->fecs.ucode == NULL);
@ -1549,6 +1549,11 @@ nvc0_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
for (i = 0; i < priv->gpc_nr; i++) {
priv->tpc_nr[i] = nv_rd32(priv, GPC_UNIT(i, 0x2608));
priv->tpc_total += priv->tpc_nr[i];
priv->ppc_nr[i] = oclass->ppc_nr;
for (j = 0; j < priv->ppc_nr[i]; j++) {
u8 mask = nv_rd32(priv, GPC_UNIT(i, 0x0c30 + (j * 4)));
priv->ppc_tpc_nr[i][j] = hweight8(mask);
}
}
/*XXX: these need figuring out... though it might not even matter */

3
drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h
View File

@ -101,6 +101,8 @@ struct nvc0_graph_priv {
u8 gpc_nr;
u8 tpc_nr[GPC_MAX];
u8 tpc_total;
u8 ppc_nr[GPC_MAX];
u8 ppc_tpc_nr[GPC_MAX][4];
struct nouveau_gpuobj *unk4188b4;
struct nouveau_gpuobj *unk4188b8;
@ -189,6 +191,7 @@ struct nvc0_graph_oclass {
struct {
struct nvc0_graph_ucode *ucode;
} gpccs;
int ppc_nr;
};
void nvc0_graph_mmio(struct nvc0_graph_priv *, const struct nvc0_graph_pack *);

1
drivers/gpu/drm/nouveau/core/engine/graph/nvd7.c
View File

@ -133,4 +133,5 @@ nvd7_graph_oclass = &(struct nvc0_graph_oclass) {
.mmio = nvd7_graph_pack_mmio,
.fecs.ucode = &nvd7_graph_fecs_ucode,
.gpccs.ucode = &nvd7_graph_gpccs_ucode,
.ppc_nr = 1,
}.base;

1
drivers/gpu/drm/nouveau/core/engine/graph/nve4.c
View File

@ -343,4 +343,5 @@ nve4_graph_oclass = &(struct nvc0_graph_oclass) {
.mmio = nve4_graph_pack_mmio,
.fecs.ucode = &nve4_graph_fecs_ucode,
.gpccs.ucode = &nve4_graph_gpccs_ucode,
.ppc_nr = 1,
}.base;

1
drivers/gpu/drm/nouveau/core/engine/graph/nvf0.c
View File

@ -241,4 +241,5 @@ nvf0_graph_oclass = &(struct nvc0_graph_oclass) {
.mmio = nvf0_graph_pack_mmio,
.fecs.ucode = &nvf0_graph_fecs_ucode,
.gpccs.ucode = &nvf0_graph_gpccs_ucode,
.ppc_nr = 2,
}.base;