powerpc: Define 32/64 bit asm macros and use them in fpu.S
These macros help in writing assembly code that works for both ppc32 and ppc64. With this we now have a common fpu.S. This takes out load_up_fpu from head_64.S. Signed-off-by: Paul Mackerras <paulus@samba.org>
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Paul Mackerras
parent
6ce52e6438
commit
b85a046af3
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@ -27,13 +27,9 @@
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* Load up this task's FP registers from its thread_struct,
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* enable the FPU for the current task and return to the task.
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*/
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.globl load_up_fpu
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load_up_fpu:
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_GLOBAL(load_up_fpu)
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mfmsr r5
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ori r5,r5,MSR_FP
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#ifdef CONFIG_PPC64BRIDGE
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clrldi r5,r5,1 /* turn off 64-bit mode */
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#endif /* CONFIG_PPC64BRIDGE */
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SYNC
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MTMSRD(r5) /* enable use of fpu now */
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isync
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@ -43,67 +39,57 @@ load_up_fpu:
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* to another. Instead we call giveup_fpu in switch_to.
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*/
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#ifndef CONFIG_SMP
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tophys(r6,0) /* get __pa constant */
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addis r3,r6,last_task_used_math@ha
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lwz r4,last_task_used_math@l(r3)
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cmpwi 0,r4,0
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LOADBASE(r3, last_task_used_math)
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tophys(r3,r3)
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LDL r4,OFF(last_task_used_math)(r3)
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CMPI 0,r4,0
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beq 1f
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add r4,r4,r6
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tophys(r4,r4)
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addi r4,r4,THREAD /* want last_task_used_math->thread */
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SAVE_32FPRS(0, r4)
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mffs fr0
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stfd fr0,THREAD_FPSCR-4(r4)
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lwz r5,PT_REGS(r4)
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add r5,r5,r6
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lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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LDL r5,PT_REGS(r4)
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tophys(r5,r5)
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LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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li r10,MSR_FP|MSR_FE0|MSR_FE1
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andc r4,r4,r10 /* disable FP for previous task */
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stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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1:
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#endif /* CONFIG_SMP */
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/* enable use of FP after return */
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#ifdef CONFIG_PPC32
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mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
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lwz r4,THREAD_FPEXC_MODE(r5)
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ori r9,r9,MSR_FP /* enable FP for current */
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or r9,r9,r4
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#else
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ld r4,PACACURRENT(r13)
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addi r5,r4,THREAD /* Get THREAD */
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ld r4,THREAD_FPEXC_MODE(r5)
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ori r12,r12,MSR_FP
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or r12,r12,r4
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std r12,_MSR(r1)
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#endif
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lfd fr0,THREAD_FPSCR-4(r5)
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mtfsf 0xff,fr0
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REST_32FPRS(0, r5)
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#ifndef CONFIG_SMP
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subi r4,r5,THREAD
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sub r4,r4,r6
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stw r4,last_task_used_math@l(r3)
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tovirt(r4,r4)
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STL r4,OFF(last_task_used_math)(r3)
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#endif /* CONFIG_SMP */
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/* restore registers and return */
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/* we haven't used ctr or xer or lr */
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b fast_exception_return
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/*
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* FP unavailable trap from kernel - print a message, but let
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* the task use FP in the kernel until it returns to user mode.
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*/
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.globl KernelFP
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KernelFP:
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lwz r3,_MSR(r1)
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ori r3,r3,MSR_FP
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stw r3,_MSR(r1) /* enable use of FP after return */
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lis r3,86f@h
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ori r3,r3,86f@l
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mr r4,r2 /* current */
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lwz r5,_NIP(r1)
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bl printk
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b ret_from_except
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86: .string "floating point used in kernel (task=%p, pc=%x)\n"
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.align 4,0
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/*
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* giveup_fpu(tsk)
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* Disable FP for the task given as the argument,
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* and save the floating-point registers in its thread_struct.
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* Enables the FPU for use in the kernel on return.
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*/
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.globl giveup_fpu
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giveup_fpu:
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_GLOBAL(giveup_fpu)
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mfmsr r5
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ori r5,r5,MSR_FP
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SYNC_601
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@ -111,23 +97,23 @@ giveup_fpu:
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MTMSRD(r5) /* enable use of fpu now */
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SYNC_601
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isync
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cmpwi 0,r3,0
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CMPI 0,r3,0
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beqlr- /* if no previous owner, done */
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addi r3,r3,THREAD /* want THREAD of task */
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lwz r5,PT_REGS(r3)
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cmpwi 0,r5,0
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LDL r5,PT_REGS(r3)
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CMPI 0,r5,0
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SAVE_32FPRS(0, r3)
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mffs fr0
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stfd fr0,THREAD_FPSCR-4(r3)
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beq 1f
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lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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LDL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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li r3,MSR_FP|MSR_FE0|MSR_FE1
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andc r4,r4,r3 /* disable FP for previous task */
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stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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STL r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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1:
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#ifndef CONFIG_SMP
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li r5,0
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lis r4,last_task_used_math@ha
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stw r5,last_task_used_math@l(r4)
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LOADBASE(r4,last_task_used_math)
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STL r5,OFF(last_task_used_math)(r4)
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#endif /* CONFIG_SMP */
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blr
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@ -80,7 +80,7 @@ _stext:
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_GLOBAL(__start)
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/* NOP this out unconditionally */
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BEGIN_FTR_SECTION
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b .__start_initialization_multiplatform
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b .__start_initialization_multiplatform
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END_FTR_SECTION(0, 1)
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#endif /* CONFIG_PPC_MULTIPLATFORM */
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@ -857,62 +857,6 @@ fp_unavailable_common:
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bl .kernel_fp_unavailable_exception
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BUG_OPCODE
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/*
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* load_up_fpu(unused, unused, tsk)
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* Disable FP for the task which had the FPU previously,
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* and save its floating-point registers in its thread_struct.
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* Enables the FPU for use in the kernel on return.
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* On SMP we know the fpu is free, since we give it up every
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* switch (ie, no lazy save of the FP registers).
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* On entry: r13 == 'current' && last_task_used_math != 'current'
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*/
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_STATIC(load_up_fpu)
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mfmsr r5 /* grab the current MSR */
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ori r5,r5,MSR_FP
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mtmsrd r5 /* enable use of fpu now */
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isync
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/*
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* For SMP, we don't do lazy FPU switching because it just gets too
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* horrendously complex, especially when a task switches from one CPU
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* to another. Instead we call giveup_fpu in switch_to.
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*
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*/
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#ifndef CONFIG_SMP
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ld r3,last_task_used_math@got(r2)
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ld r4,0(r3)
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cmpdi 0,r4,0
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beq 1f
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/* Save FP state to last_task_used_math's THREAD struct */
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addi r4,r4,THREAD
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SAVE_32FPRS(0, r4)
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mffs fr0
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stfd fr0,THREAD_FPSCR(r4)
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/* Disable FP for last_task_used_math */
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ld r5,PT_REGS(r4)
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ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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li r6,MSR_FP|MSR_FE0|MSR_FE1
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andc r4,r4,r6
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std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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1:
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#endif /* CONFIG_SMP */
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/* enable use of FP after return */
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ld r4,PACACURRENT(r13)
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addi r5,r4,THREAD /* Get THREAD */
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ld r4,THREAD_FPEXC_MODE(r5)
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ori r12,r12,MSR_FP
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or r12,r12,r4
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std r12,_MSR(r1)
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lfd fr0,THREAD_FPSCR(r5)
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mtfsf 0xff,fr0
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REST_32FPRS(0, r5)
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#ifndef CONFIG_SMP
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/* Update last_task_used_math to 'current' */
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subi r4,r5,THREAD /* Back to 'current' */
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std r4,0(r3)
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#endif /* CONFIG_SMP */
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/* restore registers and return */
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b fast_exception_return
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.align 7
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.globl altivec_unavailable_common
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altivec_unavailable_common:
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@ -103,12 +103,13 @@
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oris rn,rn,name##@h; \
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ori rn,rn,name##@l
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#define LOADBASE(rn,name) \
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lis rn,name@highest; \
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ori rn,rn,name@higher; \
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rldicr rn,rn,32,31; \
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oris rn,rn,name@ha
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#define LOADBASE(rn,name) \
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.section .toc,"aw"; \
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1: .tc name[TC],name; \
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.previous; \
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ld rn,1b@toc(r2)
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#define OFF(name) 0
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#define SET_REG_TO_CONST(reg, value) \
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lis reg,(((value)>>48)&0xFFFF); \
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@ -123,6 +124,23 @@
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rldicr reg,reg,32,31; \
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oris reg,reg,(label)@h; \
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ori reg,reg,(label)@l;
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/* operations for longs and pointers */
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#define LDL ld
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#define STL std
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#define CMPI cmpdi
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#else /* 32-bit */
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#define LOADBASE(rn,name) \
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lis rn,name@ha
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#define OFF(name) name@l
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/* operations for longs and pointers */
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#define LDL lwz
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#define STL stw
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#define CMPI cmpwi
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#endif
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/* various errata or part fixups */
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